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/openbmc/u-boot/arch/arm/mach-tegra/tegra114/
H A Dpinmux.c125 PIN(PU0, OWR, UARTA, RSVD3, RSVD4),
225 PIN(KB_COL4_PQ4, KBC, OWR, SDMMC3, UARTA),
235 PIN(OWR, OWR, RSVD2, RSVD3, RSVD4),
282 PIN(SDMMC3_CD_N_PV2, SDMMC3, OWR, RSVD3, RSVD4),
/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dpinmux.c125 PIN(PU0, OWR, UARTA, GMI, RSVD4),
224 PIN(KB_COL4_PQ4, KBC, OWR, SDMMC3, UARTA),
235 PIN(OWR, OWR, RSVD2, RSVD3, RSVD4),
284 PIN(SDMMC3_CD_N_PV2, SDMMC3, OWR, RSVD3, RSVD4),
/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dpinmux.c49 PIN(PV2, OWR, RSVD2, RSVD3, RSVD4),
122 PIN(PU0, OWR, UARTA, GMI, RSVD4),
205 PIN(KB_ROW5_PR5, KBC, NAND, TRACE, OWR),
230 PIN(OWR, OWR, CEC, RSVD3, RSVD4),
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra114-pinmux.yaml67 core_pwr_req, cpu_pwr_req, pwr_int_n, owr, dap1_fs_pn0,
92 nand, nand_alt, owr, pmi, pwm0, pwm1, pwm2, pwm3, pwron,
H A Dnvidia,tegra30-pinmux.yaml96 core_pwr_req, cpu_pwr_req, owr, pwr_int_n,
113 i2s3, i2s4, invalid, kbc, mio, nand, nand_alt, owr, pcie,
H A Dnvidia,tegra124-pinmux.yaml74 clk_32k_in, owr, dap1_fs_pn0, dap1_din_pn1, dap1_dout_pn2,
107 owr, pmi, pwm0, pwm1, pwm2, pwm3, pwron, reset_out_n, rsvd1,
H A Dnvidia,tegra20-pinmux.yaml63 mipi_hs, nand, osc, owr, pcie, plla_out, pllc_out1,
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dpinmux.c314 PIN(KBCE, KBC, NAND, OWR, RSVD4),
319 PIN(OWC, OWR, RSVD2, RSVD3, RSVD4),
343 PIN(UAC, OWR, RSVD2, RSVD3, RSVD4),
/openbmc/u-boot/board/nvidia/dalmore/
H A Dpinmux-config-dalmore.h261 /* OWR pinmux */
262 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
/openbmc/u-boot/board/nvidia/cardhu/
H A Dpinmux-config-cardhu.h125 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
248 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
/openbmc/u-boot/board/toradex/colibri_t30/
H A Dpinmux-config-colibri_t30.h126 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, OUTPUT),
256 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra114.c382 PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"),
1494 FUNCTION(owr),
1647 …PINGROUP(pu0, OWR, UARTA, RSVD3, RSVD4, 0x3184, N, N…
1739 …PINGROUP(kb_col4_pq4, KBC, OWR, SDMMC3, UARTA, 0x330c, N, N…
1749 …PINGROUP(owr, OWR, RSVD2, RSVD3, RSVD4, 0x3334, N, N…
1778 …PINGROUP(sdmmc3_cd_n_pv2, SDMMC3, OWR, RSVD3, RSVD4, 0x33e8, N, N…
1816 DRV_PINGROUP(owr, 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N),
H A Dpinctrl-tegra124.c421 PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"),
1654 FUNCTION(owr),
1840 …PINGROUP(pu0, OWR, UARTA, GMI, RSVD4, 0x3184, N, N…
1937 …PINGROUP(kb_col4_pq4, KBC, OWR, SDMMC3, UARTA, 0x330c, N, N…
1946 …PINGROUP(owr, OWR, RSVD2, RSVD3, RSVD4, 0x3334, N, N…
1980 …PINGROUP(sdmmc3_cd_n_pv2, SDMMC3, OWR, RSVD3, RSVD4, 0x33e8, N, N…
2023 DRV_PINGROUP(owr, 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2, N),
H A Dpinctrl-tegra30.c548 PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"),
2053 FUNCTION(owr),
2312 …PINGROUP(kb_row5_pr5, KBC, NAND, TRACE, OWR, 0x32d0, N, …
2331 …PINGROUP(pu0, OWR, UARTA, GMI, RSVD4, 0x3184, N, …
2341 …PINGROUP(pv2, OWR, RSVD2, RSVD3, RSVD4, 0x3060, N, …
2418 …PINGROUP(owr, OWR, CEC, RSVD3, RSVD4, 0x3334, N, …
2451 DRV_PINGROUP(owr, 0x920, 2, 3, 4, 12, 5, 20, 5, 28, 2, 30, 2),
H A Dpinctrl-tegra20.c1922 FUNCTION(owr),
2082 MUX_PG(kbce, KBC, NAND, OWR, RSVD4, 0x14, 26, 0x80, 28, 0xb0, 2),
2124 MUX_PG(owc, OWR, RSVD2, RSVD3, RSVD4, 0x14, 31, 0x84, 8, 0xb0, 30),
2148 MUX_PG(uac, OWR, RSVD2, RSVD3, RSVD4, 0x18, 20, 0x80, 4, 0xac, 4),
2207 DRV_PG(owr, 0x908),
/openbmc/u-boot/board/toradex/apalis_t30/
H A Dpinmux-config-apalis_t30.h128 DEFAULT_PINMUX(PV2, OWR, NORMAL, NORMAL, INPUT),
267 DEFAULT_PINMUX(OWR, OWR, NORMAL, NORMAL, INPUT),
/openbmc/u-boot/doc/device-tree-bindings/clock/
H A Dnvidia,tegra20-car.txt101 71 owr
/openbmc/qemu/hw/virtio/
H A Dtrace-events6 …r *name, uint64_t new_size, uint64_t gpa, uint64_t owr) "%s: size: 0x%"PRIx64 " gpa: 0x%"PRIx64 "
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra114-roth.dts478 owr {
479 nvidia,pins = "owr";
480 nvidia,function = "owr";
H A Dtegra20-colibri.dtsi398 owr {
400 nvidia,function = "owr";
H A Dtegra30-beaver.dts1156 nvidia,function = "owr";
1219 nvidia,function = "owr";
1712 owr {
1713 nvidia,pins = "owr";
1714 nvidia,function = "owr";
H A Dtegra114-dalmore.dts476 owr {
477 nvidia,pins = "owr";
478 nvidia,function = "owr";
H A Dtegra30-asus-nexus7-grouper-common.dtsi752 owr {
753 nvidia,pins = "owr";
754 nvidia,function = "owr";
H A Dtegra30-colibri.dtsi181 owr {
182 nvidia,pins = "owr";
H A Dtegra30-asus-transformer-common.dtsi1049 owr {
1050 nvidia,pins = "owr";
1051 nvidia,function = "owr";

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