Home
last modified time | relevance | path

Searched +full:out +full:- +full:ports (Results 1 – 25 of 1109) sorted by relevance

12345678910>>...45

/openbmc/linux/Documentation/devicetree/bindings/soundwire/
H A Dqcom,soundwire.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
19 - qcom,soundwire-v1.3.0
20 - qcom,soundwire-v1.5.0
21 - qcom,soundwire-v1.5.1
22 - qcom,soundwire-v1.6.0
23 - qcom,soundwire-v1.7.0
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3660-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2016-2018 HiSilicon Ltd.
15 compatible = "arm,coresight-etm4x", "arm,primecell";
18 clock-names = "apb_pclk";
21 out-ports {
24 remote-endpoint =
32 compatible = "arm,coresight-etm4x", "arm,primecell";
35 clock-names = "apb_pclk";
38 out-ports {
41 remote-endpoint =
[all …]
H A Dhi6220-coresight.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
14 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
17 clock-names = "apb_pclk";
19 out-ports {
22 remote-endpoint =
28 in-ports {
31 remote-endpoint =
39 compatible = "arm,coresight-tmc", "arm,primecell";
42 clock-names = "apb_pclk";
44 in-ports {
[all …]
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013-2014 HiSilicon Ltd.
6 * Copyright (C) 2013-2014 Linaro Ltd.
12 /* memory bus is 64-bit */
13 #address-cells = <2>;
14 #size-cells = <2>;
21 compatible = "hisilicon,hip04-bootwrapper";
22 boot-method = <0x10c00000 0x10000>, <0xe0000100 0x1000>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
/openbmc/linux/drivers/thunderbolt/
H A Dtest.c1 // SPDX-License-Identifier: GPL-2.0
20 res->data = ida; in __ida_init()
26 struct ida *ida = res->data; in __ida_destroy()
47 sw->config.upstream_port_number = upstream_port; in alloc_switch()
48 sw->config.depth = tb_route_length(route); in alloc_switch()
49 sw->config.route_hi = upper_32_bits(route); in alloc_switch()
50 sw->config.route_lo = lower_32_bits(route); in alloc_switch()
51 sw->config.enabled = 0; in alloc_switch()
52 sw->config.max_port_number = max_port_number; in alloc_switch()
54 size = (sw->config.max_port_number + 1) * sizeof(*sw->ports); in alloc_switch()
[all …]
/openbmc/linux/arch/arm64/boot/dts/sprd/
H A Dsc9863a.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/sprd,sc9863a-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #address-cells = <2>;
15 #size-cells = <0>;
17 cpu-map {
48 compatible = "arm,cortex-a55";
50 enable-method = "psci";
51 cpu-idle-states = <&CORE_PD>;
56 compatible = "arm,cortex-a55";
[all …]
H A Dsc9860.dtsi6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
19 cpu-map {
53 compatible = "arm,cortex-a53";
55 enable-method = "psci";
56 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
[all …]
H A Dsc9836.dtsi10 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #address-cells = <2>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
23 enable-method = "psci";
28 compatible = "arm,cortex-a53";
30 enable-method = "psci";
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
[all …]
H A Dums512.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/sprd,ums512-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
20 cpu-map {
51 compatible = "arm,cortex-a55";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/arm/
H A Darm,coresight-static-replicator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-replicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
28 const: arm,coresight-static-replicator
30 power-domains:
[all …]
H A Dqcom,coresight-tpda.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Trace, Profiling and Diagnostics Aggregator - TPDA
13 more attached TPDM and pushing the resultant (packetized) data out a
15 task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
36 - Mao Jinlong <quic_jinlmao@quicinc.com>
37 - Tao Zhang <quic_taozha@quicinc.com>
45 - qcom,coresight-tpda
[all …]
H A Darm,coresight-static-funnel.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-static-funnel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Coresight static funnel merges 2-8 trace sources into a single trace
28 const: arm,coresight-static-funnel
[all …]
H A Darm,coresight-dynamic-funnel.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-funnel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Coresight funnel merges 2-8 trace sources into a single trace
24 stream with programmable enable and priority of input ports.
[all …]
H A Darm,coresight-dynamic-replicator.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-dynamic-replicator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
31 const: arm,coresight-dynamic-replicator
33 - compatible
[all …]
H A Darm,coresight-etm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-etm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
23 The Embedded Trace Macrocell (ETM) is a real-time trace module providing
31 - arm,coresight-etm3x
[all …]
H A Darm,coresight-dummy-source.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-dummy-source.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
19 there would be Coresight source trace components on sub-processor which
30 - Mike Leach <mike.leach@linaro.org>
31 - Suzuki K Poulose <suzuki.poulose@arm.com>
32 - James Clark <james.clark@arm.com>
33 - Mao Jinlong <quic_jinlmao@quicinc.com>
34 - Hao Zhang <quic_hazha@quicinc.com>
[all …]
H A Darm,coresight-tmc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-tmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
32 const: arm,coresight-tmc
34 - compatible
[all …]
H A Darm,coresight-stm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <mathieu.poirier@linaro.org>
11 - Mike Leach <mike.leach@linaro.org>
12 - Leo Yan <leo.yan@linaro.org>
13 - Suzuki K Poulose <suzuki.poulose@arm.com>
24 primarily for high-bandwidth trace of instrumentation embedded into software.
25 This instrumentation is made up of memory-mapped writes to the STM Advanced
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-cs-r1r2.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
8 clock-names = "apb_pclk";
9 power-domains = <&scpi_devpd 0>;
10 out-ports {
13 remote-endpoint = <&etf1_in_port>;
17 in-ports {
27 compatible = "arm,coresight-tmc", "arm,primecell";
31 clock-names = "apb_pclk";
32 power-domains = <&scpi_devpd 0>;
[all …]
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
[all …]
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dsharedbuffer_configuration.py2 # SPDX-License-Identifier: GPL-2.0
19 - random size
22 - random pool number
23 - random threshold
26 - random threshold
37 # For threshold of 16, this works out to be about 12MB on Spectrum-1,
38 # and about 17MB on Spectrum-2.
67 return arr[random.randint(0, len(arr) - 1)]
122 out = subprocess.check_output(cmd, shell=True)
124 return j.loads(out)
[all …]
/openbmc/linux/drivers/phy/tegra/
H A Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
/openbmc/linux/tools/testing/selftests/bpf/
H A Dxdp_synproxy.c1 // SPDX-License-Identifier: LGPL-2.1 OR BSD-2-Clause
39 fprintf(stderr, "Error: bpf_tc_hook_destroy: %s\n", strerror(-err)); in cleanup()
48 fprintf(stderr, "Error: bpf_prog_get_fd_by_id: %s\n", strerror(-prog_fd)); in cleanup()
49 err = bpf_xdp_attach(ifindex, -1, 0, NULL); in cleanup()
51 fprintf(stderr, "Error: bpf_set_link_xdp_fd: %s\n", strerror(-err)); in cleanup()
57 err = bpf_xdp_attach(ifindex, -1, XDP_FLAGS_REPLACE, &opts); in cleanup()
60 fprintf(stderr, "Error: bpf_set_link_xdp_fd_opts: %s\n", strerror(-err)); in cleanup()
62 if (err != -EEXIST) { in cleanup()
73 …s [--iface <iface>|--prog <prog_id>] [--mss4 <mss ipv4> --mss6 <mss ipv6> --wscale <wscale> --ttl … in usage()
92 __u64 *tcpipopts, char **ports, bool *single, bool *tc) in parse_options() argument
[all …]
/openbmc/linux/tools/perf/Documentation/
H A Dperf-iostat.txt1 perf-iostat(1)
5 ----
6 perf-iostat - Show I/O performance metrics
9 --------
12 'perf iostat' <ports> \-- <command> [<options>]
15 -----------
18 - Inbound Read - I/O devices below root port read from the host memory, in MB
20 - Inbound Write - I/O devices below root port write to the host memory, in MB
22 - Outbound Read - CPU reads from I/O devices below root port, in MB
24 - Outbound Write - CPU writes to I/O devices below root port, in MB
[all …]
/openbmc/qemu/qapi/
H A Drocker.json1 # -*- Mode: Python -*-
17 # @ports: number of front-panel ports
22 'data': { 'name': 'str', 'id': 'uint64', 'ports': 'uint32' } }
25 # @query-rocker:
35 # .. qmp-example::
37 # -> { "execute": "query-rocker", "arguments": { "name": "sw1" } }
38 # <- { "return": {"name": "sw1", "ports": 2, "id": 1327446905938}} number
40 { 'command': 'query-rocker',
79 # @link-up: physical link is UP on port
90 'data': { 'name': 'str', 'enabled': 'bool', 'link-up': 'bool',
[all …]

12345678910>>...45