1*440b075bSKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2a8fbe144SMao Jinlong# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3a8fbe144SMao Jinlong%YAML 1.2 4a8fbe144SMao Jinlong--- 5a8fbe144SMao Jinlong$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml# 6a8fbe144SMao Jinlong$schema: http://devicetree.org/meta-schemas/core.yaml# 7a8fbe144SMao Jinlong 8a8fbe144SMao Jinlongtitle: Trace, Profiling and Diagnostics Aggregator - TPDA 9a8fbe144SMao Jinlong 10a8fbe144SMao Jinlongdescription: | 11a8fbe144SMao Jinlong TPDAs are responsible for packetization and timestamping of data sets 12a8fbe144SMao Jinlong utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or 13a8fbe144SMao Jinlong more attached TPDM and pushing the resultant (packetized) data out a 14a8fbe144SMao Jinlong master ATB interface. Performing an arbitrated ATB interleaving (funneling) 15a8fbe144SMao Jinlong task for free-flowing data from TPDM (i.e. CMB and DSB data set flows). 16a8fbe144SMao Jinlong 17a8fbe144SMao Jinlong There is no strict binding between TPDM and TPDA. TPDA can have multiple 18a8fbe144SMao Jinlong TPDMs connect to it. But There must be only one TPDA in the path from the 19a8fbe144SMao Jinlong TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or 20a8fbe144SMao Jinlong connect to funnel which will connect to TPDA's inport. 21a8fbe144SMao Jinlong 22a8fbe144SMao Jinlong We can use the commands are similar to the below to validate TPDMs. 23a8fbe144SMao Jinlong Enable coresight sink first. 24a8fbe144SMao Jinlong 25a8fbe144SMao Jinlong echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink 26a8fbe144SMao Jinlong echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source 27a8fbe144SMao Jinlong echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test 28a8fbe144SMao Jinlong echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test 29a8fbe144SMao Jinlong 30a8fbe144SMao Jinlong The test data will be collected in the coresight sink which is enabled. 31a8fbe144SMao Jinlong If rwp register of the sink is keeping updating when do integration_test 32a8fbe144SMao Jinlong (by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM 33a8fbe144SMao Jinlong to sink. 34a8fbe144SMao Jinlong 35a8fbe144SMao Jinlongmaintainers: 36a8fbe144SMao Jinlong - Mao Jinlong <quic_jinlmao@quicinc.com> 37a8fbe144SMao Jinlong - Tao Zhang <quic_taozha@quicinc.com> 38a8fbe144SMao Jinlong 39a8fbe144SMao Jinlong# Need a custom select here or 'arm,primecell' will match on lots of nodes 40a8fbe144SMao Jinlongselect: 41a8fbe144SMao Jinlong properties: 42a8fbe144SMao Jinlong compatible: 43a8fbe144SMao Jinlong contains: 44a8fbe144SMao Jinlong enum: 45a8fbe144SMao Jinlong - qcom,coresight-tpda 46a8fbe144SMao Jinlong required: 47a8fbe144SMao Jinlong - compatible 48a8fbe144SMao Jinlong 49a8fbe144SMao Jinlongproperties: 50a8fbe144SMao Jinlong $nodename: 51a8fbe144SMao Jinlong pattern: "^tpda(@[0-9a-f]+)$" 52a8fbe144SMao Jinlong compatible: 53a8fbe144SMao Jinlong items: 54a8fbe144SMao Jinlong - const: qcom,coresight-tpda 55a8fbe144SMao Jinlong - const: arm,primecell 56a8fbe144SMao Jinlong 57a8fbe144SMao Jinlong reg: 58a8fbe144SMao Jinlong minItems: 1 59a8fbe144SMao Jinlong maxItems: 2 60a8fbe144SMao Jinlong 61a8fbe144SMao Jinlong clocks: 62a8fbe144SMao Jinlong maxItems: 1 63a8fbe144SMao Jinlong 64a8fbe144SMao Jinlong clock-names: 65a8fbe144SMao Jinlong items: 66a8fbe144SMao Jinlong - const: apb_pclk 67a8fbe144SMao Jinlong 68a8fbe144SMao Jinlong in-ports: 69a8fbe144SMao Jinlong type: object 70a8fbe144SMao Jinlong description: | 71a8fbe144SMao Jinlong Input connections from TPDM to TPDA 72a8fbe144SMao Jinlong $ref: /schemas/graph.yaml#/properties/ports 73a8fbe144SMao Jinlong 74a8fbe144SMao Jinlong out-ports: 75a8fbe144SMao Jinlong type: object 76a8fbe144SMao Jinlong description: | 77a8fbe144SMao Jinlong Output connections from the TPDA to legacy CoreSight trace bus. 78a8fbe144SMao Jinlong $ref: /schemas/graph.yaml#/properties/ports 79a8fbe144SMao Jinlong 80a8fbe144SMao Jinlong properties: 81a8fbe144SMao Jinlong port: 82a8fbe144SMao Jinlong description: 83a8fbe144SMao Jinlong Output connection from the TPDA to legacy CoreSight Trace bus. 84a8fbe144SMao Jinlong $ref: /schemas/graph.yaml#/properties/port 85a8fbe144SMao Jinlong 86a8fbe144SMao Jinlongrequired: 87a8fbe144SMao Jinlong - compatible 88a8fbe144SMao Jinlong - reg 89a8fbe144SMao Jinlong - clocks 90a8fbe144SMao Jinlong - clock-names 91a8fbe144SMao Jinlong - in-ports 92a8fbe144SMao Jinlong - out-ports 93a8fbe144SMao Jinlong 94a8fbe144SMao JinlongadditionalProperties: false 95a8fbe144SMao Jinlong 96a8fbe144SMao Jinlongexamples: 97a8fbe144SMao Jinlong # minimum tpda definition. 98a8fbe144SMao Jinlong - | 99a8fbe144SMao Jinlong tpda@6004000 { 100a8fbe144SMao Jinlong compatible = "qcom,coresight-tpda", "arm,primecell"; 101a8fbe144SMao Jinlong reg = <0x6004000 0x1000>; 102a8fbe144SMao Jinlong 103a8fbe144SMao Jinlong clocks = <&aoss_qmp>; 104a8fbe144SMao Jinlong clock-names = "apb_pclk"; 105a8fbe144SMao Jinlong 106a8fbe144SMao Jinlong in-ports { 107a8fbe144SMao Jinlong #address-cells = <1>; 108a8fbe144SMao Jinlong #size-cells = <0>; 109a8fbe144SMao Jinlong 110a8fbe144SMao Jinlong port@0 { 111a8fbe144SMao Jinlong reg = <0>; 112a8fbe144SMao Jinlong tpda_qdss_0_in_tpdm_dcc: endpoint { 113a8fbe144SMao Jinlong remote-endpoint = 114a8fbe144SMao Jinlong <&tpdm_dcc_out_tpda_qdss_0>; 115a8fbe144SMao Jinlong }; 116a8fbe144SMao Jinlong }; 117a8fbe144SMao Jinlong }; 118a8fbe144SMao Jinlong 119a8fbe144SMao Jinlong out-ports { 120a8fbe144SMao Jinlong port { 121a8fbe144SMao Jinlong tpda_qdss_out_funnel_in0: endpoint { 122a8fbe144SMao Jinlong remote-endpoint = 123a8fbe144SMao Jinlong <&funnel_in0_in_tpda_qdss>; 124a8fbe144SMao Jinlong }; 125a8fbe144SMao Jinlong }; 126a8fbe144SMao Jinlong }; 127a8fbe144SMao Jinlong }; 128a8fbe144SMao Jinlong 129a8fbe144SMao Jinlong... 130