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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb-drd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-drd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic USB OTG Controller
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 otg-rev:
15 Tells usb driver the release number of the OTG and EH supplement with
16 which the device and its descriptors are compliant, in binary-coded
17 decimal (i.e. 2.0 is 0200H). This property is used if any real OTG
[all …]
H A Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare HS OTG USB 2.0 controller
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
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/openbmc/linux/drivers/usb/phy/
H A Dphy-ulpi.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include <linux/usb/otg.h>
47 if (phy->flags & ULPI_OTG_ID_PULLUP) in ulpi_set_otg_flags()
51 * ULPI Specification rev.1.1 default in ulpi_set_otg_flags()
54 if (phy->flags & ULPI_OTG_DP_PULLDOWN_DIS) in ulpi_set_otg_flags()
57 if (phy->flags & ULPI_OTG_DM_PULLDOWN_DIS) in ulpi_set_otg_flags()
60 if (phy->flags & ULPI_OTG_EXTVBUSIND) in ulpi_set_otg_flags()
71 * ULPI Specification rev.1.1 default in ulpi_set_fc_flags()
74 if (phy->flags & ULPI_FC_HS) in ulpi_set_fc_flags()
76 else if (phy->flags & ULPI_FC_LS) in ulpi_set_fc_flags()
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H A Dphy-omap-otg.c1 // SPDX-License-Identifier: GPL-2.0
3 * OMAP OTG controller driver
5 * Based on code from tahvo-usb.c and isp1301_omap.c drivers.
7 * Copyright (C) 2005-2006 Nokia Corporation
19 #include <linux/platform_data/usb-omap1.h>
44 l = readl(otg_dev->base + OMAP_OTG_CTRL); in omap_otg_ctrl()
47 writel(l, otg_dev->base + OMAP_OTG_CTRL); in omap_otg_ctrl()
52 if (!otg_dev->id && otg_dev->vbus) in omap_otg_set_mode()
53 /* Set B-session valid. */ in omap_otg_set_mode()
55 else if (otg_dev->vbus) in omap_otg_set_mode()
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H A Dphy-ab8500-usb.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2010-2013 ST-Ericsson AB
13 #include <linux/usb/otg.h>
22 #include <linux/usb/musb-ux500.h>
121 /* Driver is using the ab-iddet driver*/
152 abx500_set_register_interruptible(ab->dev, in ab8500_usb_wd_workaround()
159 abx500_set_register_interruptible(ab->dev, in ab8500_usb_wd_workaround()
167 abx500_set_register_interruptible(ab->dev, in ab8500_usb_wd_workaround()
177 ret = regulator_enable(ab->v_ape); in ab8500_usb_regulator_enable()
179 dev_err(ab->dev, "Failed to enable v-ape\n"); in ab8500_usb_regulator_enable()
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H A Dphy-fsl-usb.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
32 #include "phy-fsl-usb.h"
41 #define DRIVER_VERSION "Rev. 1.55"
43 #define DRIVER_DESC "Freescale USB OTG Transceiver Driver"
46 static const char driver_name[] = "fsl-usb2-otg";
109 fsl_writel(temp, &usb_dr_regs->ulpiview); in write_ulpi()
113 /* -------------------------------------------------------------*/
114 /* Operations that will be called from OTG Finite State Machine */
121 tmp = fsl_readl(&usb_dr_regs->otgsc) & ~OTGSC_INTSTS_MASK; in fsl_otg_chrg_vbus()
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/openbmc/linux/drivers/usb/musb/
H A Dtusb6010.c1 // SPDX-License-Identifier: GPL-2.0
3 * TUSB6010 USB 2.0 OTG Dual Role controller
9 * - Driver assumes that interface to external host (main CPU) is
27 #include <linux/dma-mapping.h>
51 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
53 u8 rev; in tusb_get_revision() local
55 rev = musb_readl(tbase, TUSB_DMA_CTRL_REV) & 0xff; in tusb_get_revision()
56 if (TUSB_REV_MAJOR(rev) == 3) { in tusb_get_revision()
60 rev |= 1; in tusb_get_revision()
63 return rev; in tusb_get_revision()
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H A Dda8xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
8 * Copyright (C) 2005-2006 by Texas Instruments
23 #include <linux/dma-mapping.h>
32 /* USB 2.0 OTG module registers */
46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
76 * - not read/write INTRUSB/INTRUSBE (except during
78 * - use INTSET/INTCLR instead.
82 * da8xx_musb_enable - enable interrupts
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H A Dmusb_dsps.c1 // SPDX-License-Identifier: GPL-2.0
21 #include <linux/dma-mapping.h>
25 #include <linux/platform_data/usb-omap.h>
135 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer()
139 wait = msecs_to_jiffies(glue->wrp->poll_timeout); in dsps_mod_timer()
143 mod_timer(&musb->dev_timer, jiffies + wait); in dsps_mod_timer()
151 if (glue->vbus_irq) in dsps_mod_timer_optional()
154 dsps_mod_timer(glue, -1); in dsps_mod_timer_optional()
165 * dsps_musb_enable - enable interrupts
169 struct device *dev = musb->controller; in dsps_musb_enable()
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/openbmc/linux/drivers/phy/ti/
H A Dphy-dm816x-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
23 * phy as being SR70LX Synopsys USB 2.0 OTG nanoPHY. It also seems at
24 * least dm816x rev c ignores writes to USB_CTRL register, but the TI
53 static int dm816x_usb_phy_set_host(struct usb_otg *otg, struct usb_bus *host) in dm816x_usb_phy_set_host() argument
55 otg->host = host; in dm816x_usb_phy_set_host()
57 otg->state = OTG_STATE_UNDEFINED; in dm816x_usb_phy_set_host()
62 static int dm816x_usb_phy_set_peripheral(struct usb_otg *otg, in dm816x_usb_phy_set_peripheral() argument
65 otg->gadget = gadget; in dm816x_usb_phy_set_peripheral()
67 otg->state = OTG_STATE_UNDEFINED; in dm816x_usb_phy_set_peripheral()
77 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
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/openbmc/linux/drivers/usb/common/
H A Dcommon.c1 // SPDX-License-Identifier: GPL-2.0
7 * compiled-in as well. Otherwise, if either of the two stacks is
17 #include <linux/usb/otg.h>
30 * usb_ep_type_string() - Returns human readable-name of the endpoint type.
31 * @ep_type: The endpoint type to return human-readable name for. If it's not
71 [USB_SPEED_LOW] = "low-speed",
72 [USB_SPEED_FULL] = "full-speed",
73 [USB_SPEED_HIGH] = "high-speed",
75 [USB_SPEED_SUPER] = "super-speed",
76 [USB_SPEED_SUPER_PLUS] = "super-speed-plus",
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/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
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H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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H A Ddm814x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm814.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/dm814x.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
30 #address-cells = <1>;
31 #size-cells = <0>;
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/openbmc/linux/Documentation/usb/
H A Dchipidea.rst5 1. How to test OTG FSM(HNP and SRP)
6 -----------------------------------
8 To show how to demo OTG HNP and SRP functions via sys input files
11 1.1 How to enable OTG FSM
12 -------------------------
18 variables for otg fsm, mount debugfs, there are 2 files
19 which can show otg fsm variables and some controller registers value::
21 cat /sys/kernel/debug/ci_hdrc.0/otg
29 otg-rev = <0x0200>;
30 adp-disable;
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/openbmc/linux/drivers/usb/chipidea/
H A Dci.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * ci.h - common structures, functions, and macros of the ChipIdea driver
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
17 #include <linux/usb/otg-fsm.h>
18 #include <linux/usb/otg.h>
77 * struct ci_hw_ep - endpoint representation
128 * struct ci_role_driver - host/gadget role driver
146 * struct hw_bank - hardware register mapping representation
166 * struct ci_hdrc - chipidea device representation
173 * @is_otg: if the device is otg-capable
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H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0
3 * core.c - ChipIdea USB IP core family device controller
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
12 * - Four transfers are supported, usbtest is passed
13 * - USB Certification for gadget: CH9 and Mass Storage are passed
14 * - Low power mode
15 * - USB wakeup
19 #include <linux/dma-mapping.h>
33 #include <linux/usb/otg.h>
44 #include "otg.h"
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/openbmc/u-boot/drivers/usb/musb-new/
H A Dam35x.c1 // SPDX-License-Identifier: GPL-2.0
8 * Copyright (c) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
21 #include <linux/dma-mapping.h>
27 #include "linux-compat.h"
35 /* USB 2.0 OTG module registers */
83 #define glue_to_musb(g) platform_get_drvdata(g->musb)
86 * am35x_musb_enable - enable interrupts
94 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_enable()
98 epmask = ((musb->epmask & AM35X_TX_EP_MASK) << AM35X_INTR_TX_SHIFT) | in am35x_musb_enable()
99 ((musb->epmask & AM35X_RX_EP_MASK) << AM35X_INTR_RX_SHIFT); in am35x_musb_enable()
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H A Dmusb_dsps.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/dma-mapping.h>
34 #include "linux-compat.h"
142 * dsps_musb_enable - enable interrupts
151 struct device *dev = musb->controller; in dsps_musb_enable()
152 struct platform_device *pdev = to_platform_device(dev->parent); in dsps_musb_enable()
154 const struct dsps_musb_wrapper *wrp = glue->wrp; in dsps_musb_enable()
158 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable()
162 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | in dsps_musb_enable()
163 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); in dsps_musb_enable()
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/openbmc/linux/arch/mips/alchemy/devboards/
H A Ddb1200.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2008-2011 Manuel Lauss
9 #include <linux/dma-mapping.h>
25 #include <asm/mach-au1x00/au1000.h>
26 #include <asm/mach-au1x00/au1100_mmc.h>
27 #include <asm/mach-au1x00/au1xxx_dbdma.h>
28 #include <asm/mach-au1x00/au1xxx_psc.h>
29 #include <asm/mach-au1x00/au1200fb.h>
30 #include <asm/mach-au1x00/au1550_spi.h>
31 #include <asm/mach-db1x00/bcsr.h>
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/openbmc/u-boot/board/freescale/ls2080ardb/
H A DREADME2 --------
3 The LS2080A Reference Design (RDB) is a high-performance computing,
7 The LS2081A Reference Design (RDB) is a high-performance computing,
12 --------------------------------------
13 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
17 -----------------------
18 - SERDES Connections, 16 lanes supporting:
19 - PCI Express - 3.0
20 - SATA 3.0
21 - XFI
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/openbmc/linux/drivers/usb/cdns3/
H A Ddrd.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2020 Cadence.
16 #include <linux/usb/otg.h>
22 * cdns_set_mode - change mode of OTG Core
39 dev_dbg(cdns->dev, "Set controller to OTG mode\n"); in cdns_set_mode()
41 if (cdns->version == CDNSP_CONTROLLER_V2) in cdns_set_mode()
42 override_reg = &cdns->otg_cdnsp_regs->override; in cdns_set_mode()
43 else if (cdns->version == CDNS3_CONTROLLER_V1) in cdns_set_mode()
44 override_reg = &cdns->otg_v1_regs->override; in cdns_set_mode()
46 override_reg = &cdns->otg_v0_regs->ctrl1; in cdns_set_mode()
[all …]
/openbmc/u-boot/board/freescale/ls2080aqds/
H A DREADME2 --------
3 The LS2080A Development System (QDS) is a high-performance computing,
10 --------------------
11 Please refer arch/arm/cpu/armv8/fsl-layerscape/doc/README.soc for LS2080A,
15 -----------------------
16 - SERDES Connections, 16 lanes supporting:
17 - PCI Express - 3.0
18 - SGMII, SGMII 2.5
19 - QSGMII
20 - SATA 3.0
[all …]
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-brain.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Veyron Brain Rev 0 board device tree source
8 /dts-v1/;
9 #include "rk3288-veyron.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
14 compatible = "google,veyron-brain-rev0", "google,veyron-brain",
17 vcc33_sys: vcc33-sys {
18 vin-supply = <&vcc_5v>;
22 compatible = "regulator-fixed";
23 regulator-name = "vcc33_io";
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/openbmc/u-boot/board/gateworks/gw_ventana/
H A Dgw_ventana.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/sata.h>
18 #include <asm/mach-imx/spi.h>
19 #include <asm/mach-imx/video.h>
107 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
116 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
124 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
144 /* OTG PWR */
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