Searched full:osd1 (Results 1 – 19 of 19) sorted by relevance
24 * - OSD1 RGB565/RGB888/xRGB8888 scanout27 * - OSD1 Commit on Vsync40 * - OSD1 full scaling to support TV overscan84 /* VPP WRAP OSD1 matrix */ in meson_viu_set_g12a_osd1_matrix()314 /* VIU OSD1 Reset as workaround for GXL+ Alpha OSD Bug */325 /* Reset OSD1 */ in meson_viu_osd1_reset()385 /* Select AFBCD path for OSD1 */ in meson_viu_g12a_enable_osd1_afbc()393 /* Disable AFBCD path for OSD1 */ in meson_viu_g12a_disable_osd1_afbc()437 /* Initialize OSD1 fifo control register */ in meson_viu_init()
21 * - Postblend, Blends the OSD1 only23 * - Vertical OSD Scaler for OSD1 only, we disable vertical scaler and
35 * decoded pixel stream to the OSD1 Plane pixel composer.50 * into a private internal physical address where the OSD1 Plane pixel
386 /* Reset OSD1 before enabling it on GXL+ SoCs */ in meson_plane_atomic_update()410 /* Disable OSD1 */ in meson_plane_atomic_disable()
377 /* Enable OSD1 */ in meson_crtc_irq()
637 /* osd1 HDR */
41 * osd1--| |-| | | \ | X--HDMI-TX
60 BIT(2), /* Select OSD1 */ in meson_vpp_setup_interlace_vscaler_osd1()174 /* Enable OSD1 */ in meson_vpu_setup_plane()
423 /* Initialize OSD1 fifo control register */ in meson_vpu_init()
23 A | osd1 | | | Blenders | | Encl ----------|----|---------------|
41 FPGA_SET_REG(screen - OSD_DH_BASE, osd1.fld, val); \54 FPGA_GET_REG(screen - OSD_DH_BASE, osd1.fld, val); \
170 __le32 osd1; member
197 struct ihs_osd osd1; /* 0x0180 */ member
24 A | osd1 | | | Blenders | | Encl ----------|----|---------------|
715 - } osd1; /* OS dependent 1 */763 - } osd1; /* OS dependent 1 */800 -#define i_reserved1 osd1.linux1.l_i_reserved1810 -#define i_translator osd1.hurd1.h_i_translator
312 } osd1; /* OS dependent 1 */ member346 #define i_reserved1 osd1.linux1.l_i_reserved1
315 The ``osd1`` field has multiple meanings depending on the creator:
788 } osd1; /* OS dependent 1 */ member934 #define i_disk_version osd1.linux1.l_i_version937 #define i_reserved1 osd1.linux1.l_i_reserved1948 #define i_translator osd1.hurd1.h_i_translator955 #define i_reserved1 osd1.masix1.m_i_reserved1
3067 1 = /dev/osd1 Second OSD Device