/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | dove.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/gpio/gpio.h> 3 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 12 interrupt-parent = <&intc>; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 compatible = "marvell,pj4a", "marvell,sheeva-v7"; 27 next-level-cache = <&l2>; [all …]
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H A D | orion5x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 7 #address-cells = <1>; 8 #size-cells = <1>; 11 interrupt-parent = <&intc>; 18 #address-cells = <2>; 19 #size-cells = <1>; 22 devbus_bootcs: devbus-bootcs { 23 compatible = "marvell,orion-devbus"; 26 #address-cells = <1>; [all …]
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H A D | kirkwood.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/gpio/gpio.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 11 interrupt-parent = <&intc>; 14 #address-cells = <1>; 15 #size-cells = <0>; 22 clock-names = "cpu_clk", "ddrclk", "powersave"; 33 compatible = "marvell,kirkwood-mbus", "simple-bus"; [all …]
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H A D | armada-370.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 15 #include "armada-370-xp.dtsi" 18 #address-cells = <1>; 19 #size-cells = <1>; 22 compatible = "marvell,armada370", "marvell,armada-370-xp"; 31 compatible = "marvell,armada370-mbus", "simple-bus"; 39 compatible = "marvell,armada-370-pcie"; 43 #address-cells = <3>; [all …]
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H A D | armada-375.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/phy/phy.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; [all …]
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H A D | armada-xp-98dx3236.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 11 #include "armada-370-xp.dtsi" 14 #address-cells = <2>; 15 #size-cells = <2>; 18 compatible = "marvell,armadaxp-98dx3236", "marvell,armada-370-xp"; 27 #address-cells = <1>; 28 #size-cells = <0>; 29 enable-method = "marvell,98dx3236-smp"; 33 compatible = "marvell,sheeva-v7"; 36 clock-latency = <1000000>; [all …]
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H A D | armada-38x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 #address-cells = <1>; 19 #size-cells = <1>; 32 compatible = "arm,cortex-a9-pmu"; 33 interrupts-extended = <&mpic 3>; 37 compatible = "marvell,armada380-mbus", "simple-bus"; [all …]
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H A D | armada-39x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 31 #address-cells = <1>; 32 #size-cells = <0>; 33 enable-method = "marvell,armada-390-smp"; 37 compatible = "arm,cortex-a9"; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio-mvebu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-mvebu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Marvell EBU GPIO controller 10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 11 - Andrew Lunn <andrew@lunn.ch> 16 - enum: 17 - marvell,armada-8k-gpio 18 - marvell,orion-gpio [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | kirkwood.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/gpio/gpio.h> 10 interrupt-parent = <&intc>; 13 #address-cells = <1>; 14 #size-cells = <0>; 21 clock-names = "cpu_clk", "ddrclk", "powersave"; 32 compatible = "marvell,kirkwood-mbus", "simple-bus"; 33 #address-cells = <2>; 34 #size-cells = <1>; [all …]
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H A D | armada-375.dtsi | 6 * Gregory CLEMENT <gregory.clement@free-electrons.com> 7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9 * This file is dual-licensed: you can use it either under the terms 49 #include <dt-bindings/interrupt-controller/arm-gic.h> 50 #include <dt-bindings/interrupt-controller/irq.h> 51 #include <dt-bindings/phy/phy.h> 70 compatible = "fixed-clock"; 71 #clock-cells = <0>; 72 clock-frequency = <1000000000>; 76 compatible = "fixed-clock"; [all …]
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H A D | armada-38x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 30 compatible = "arm,cortex-a9-pmu"; 31 interrupts-extended = <&mpic 3>; 35 compatible = "marvell,armada380-mbus", "simple-bus"; 36 u-boot,dm-pre-reloc; 37 #address-cells = <2>; [all …]
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H A D | armada-cp110-slave.dtsi | 4 * This file is dual-licensed: you can use it either under the terms 47 #include <dt-bindings/comphy/comphy_data.h> 50 cp110-slave { 51 #address-cells = <2>; 52 #size-cells = <2>; 53 compatible = "simple-bus"; 54 interrupt-parent = <&gic>; 57 config-space { 58 #address-cells = <1>; 59 #size-cells = <1>; [all …]
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/openbmc/linux/arch/arm/plat-orion/include/plat/ |
H A D | orion-gpio.h | 2 * arch/arm/plat-orion/include/plat/orion-gpio.h 4 * Marvell Orion SoC GPIO handling. 21 * Orion-specific GPIO API extensions.
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | marvell,orion-pinctrl.txt | 1 * Marvell Orion SoC pinctrl driver for mpp 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding 7 - compatible: "marvell,88f5181-pinctrl", 8 "marvell,88f5181l-pinctrl", 9 "marvell,88f5182-pinctrl", 10 "marvell,88f5281-pinctrl" 12 - reg: two register areas, the first one describing the first two 20 * Marvell Orion 88f5181l 24 mpp0 0 pcie(rstout), pci(req2), gpio 25 mpp1 1 gpio, pci(gnt2) [all …]
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/openbmc/u-boot/drivers/gpio/ |
H A D | kw_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * arch/arm/plat-orion/gpio.c 5 * Marvell Orion SoC GPIO handling. 9 * Based on (mostly copied from) plat-orion based Linux 2.6 kernel driver. 12 * Dieter Kiermaier dk-arm-linux@gmx.de 19 #include <asm/arch/gpio.h> 74 printf("%s: invalid GPIO %d\n", __func__, pin); in kw_gpio_is_valid() 99 /* Configure GPIO direction. */ in kw_gpio_direction_input() 109 printf("%s: invalid GPIO %d\n", __func__, pin); in kw_gpio_direction_output() 115 /* Configure GPIO output value. */ in kw_gpio_direction_output() [all …]
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/openbmc/linux/arch/arm/plat-orion/ |
H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only 5 ccflags-y := -I$(srctree)/$(src)/include 7 orion-gpio-$(CONFIG_GPIOLIB) += gpio.o 8 obj-$(CONFIG_PLAT_ORION_LEGACY) += irq.o pcie.o time.o common.o mpp.o 9 obj-$(CONFIG_PLAT_ORION_LEGACY) += $(orion-gpio-y)
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H A D | mpp.c | 2 * arch/arm/plat-orion/mpp.c 4 * MPP functions for Marvell orion SoCs 15 #include <linux/gpio.h> 16 #include <plat/orion-gpio.h>
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H A D | irq.c | 2 * arch/arm/plat-orion/irq.c 4 * Marvell Orion SoC IRQ handling. 20 #include <plat/orion-gpio.h> 34 ct = gc->chip_types; in orion_irq_init() 35 ct->chip.irq_mask = irq_gc_mask_clr_bit; in orion_irq_init() 36 ct->chip.irq_unmask = irq_gc_mask_set_bit; in orion_irq_init()
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H A D | gpio.c | 2 * arch/arm/plat-orion/gpio.c 4 * Marvell Orion SoC GPIO handling. 21 #include <linux/gpio/driver.h> 22 #include <linux/gpio/consumer.h> 27 #include <plat/orion-gpio.h> 30 * GPIO unit register offsets. 54 return ochip->base + GPIO_OUT_OFF; in GPIO_OUT() 59 return ochip->base + GPIO_IO_CONF_OFF; in GPIO_IO_CONF() 64 return ochip->base + GPIO_BLINK_EN_OFF; in GPIO_BLINK_EN() 69 return ochip->base + GPIO_IN_POL_OFF; in GPIO_IN_POL() [all …]
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/openbmc/linux/arch/arm64/boot/dts/marvell/ |
H A D | ac5-98dx25xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <2>; 21 #size-cells = <0>; 23 cpu-map { 36 compatible = "arm,cortex-a55"; [all …]
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/openbmc/linux/drivers/pinctrl/mvebu/ |
H A D | pinctrl-orion.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Marvell Orion pinctrl driver based on mvebu pinctrl core 5 * Author: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 7 * The first 16 MPP pins on Orion are easy to handle: they are 25 #include "pinctrl-mvebu.h" 78 MPP_VAR_FUNCTION(0x3, "gpio", NULL, V_ALL)), 80 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL), 83 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL), 85 MPP_VAR_FUNCTION(0x3, "pci-1", "pme", V_ALL)), 87 MPP_VAR_FUNCTION(0x0, "gpio", NULL, V_ALL), [all …]
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/openbmc/linux/arch/arm/mach-orion5x/ |
H A D | irq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch/arm/mach-orion5x/irq.c 5 * Core IRQ functions for Marvell Orion System On Chip 9 #include <linux/gpio.h> 13 #include <plat/orion-gpio.h> 16 #include "bridge-regs.h" 47 * Initialize gpiolib for GPIOs 0-31. in orion5x_init_irq()
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3368-orion-r68-meta.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 7 #include <dt-bindings/input/input.h> 11 model = "Rockchip Orion R68"; 12 compatible = "tronsmart,orion-r68-meta", "rockchip,rk3368"; 20 stdout-path = "serial2:115200n8"; 28 emmc_pwrseq: emmc-pwrseq { 29 compatible = "mmc-pwrseq-emmc"; 30 pinctrl-0 = <&emmc_reset>; 31 pinctrl-names = "default"; [all …]
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/openbmc/linux/drivers/media/pci/saa7146/ |
H A D | hexium_orion.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 hexium_orion.c - v4l2 driver for the Hexium Orion frame grabber cards 16 #include <media/drv-intf/saa7146_vv.h> 197 /* this is only called for old HV-PCI6/Orion cards 207 /* there are no hexium orion cards with revision 0 saa7146s */ in hexium_probe() 208 if (0 == dev->revision) { in hexium_probe() 209 return -EFAULT; in hexium_probe() 214 return -ENOMEM; in hexium_probe() 216 /* enable i2c-port pins */ in hexium_probe() 223 strscpy(hexium->i2c_adapter.name, "hexium orion", in hexium_probe() [all …]
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