Lines Matching +full:orion +full:- +full:gpio
2 * arch/arm/plat-orion/gpio.c
4 * Marvell Orion SoC GPIO handling.
21 #include <linux/gpio/driver.h>
22 #include <linux/gpio/consumer.h>
27 #include <plat/orion-gpio.h>
30 * GPIO unit register offsets.
54 return ochip->base + GPIO_OUT_OFF; in GPIO_OUT()
59 return ochip->base + GPIO_IO_CONF_OFF; in GPIO_IO_CONF()
64 return ochip->base + GPIO_BLINK_EN_OFF; in GPIO_BLINK_EN()
69 return ochip->base + GPIO_IN_POL_OFF; in GPIO_IN_POL()
74 return ochip->base + GPIO_DATA_IN_OFF; in GPIO_DATA_IN()
79 return ochip->base + GPIO_EDGE_CAUSE_OFF; in GPIO_EDGE_CAUSE()
84 return ochip->base + ochip->mask_offset + GPIO_EDGE_MASK_OFF; in GPIO_EDGE_MASK()
89 return ochip->base + ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in GPIO_LEVEL_MASK()
137 if (pin >= ochip->chip.ngpio) in orion_gpio_is_valid()
140 if ((mode & GPIO_INPUT_OK) && !test_bit(pin, &ochip->valid_input)) in orion_gpio_is_valid()
143 if ((mode & GPIO_OUTPUT_OK) && !test_bit(pin, &ochip->valid_output)) in orion_gpio_is_valid()
149 pr_debug("%s: invalid GPIO %d\n", __func__, pin); in orion_gpio_is_valid()
154 * GPIO primitives.
164 return -EINVAL; in orion_gpio_request()
173 return -EINVAL; in orion_gpio_direction_input()
175 spin_lock_irqsave(&ochip->lock, flags); in orion_gpio_direction_input()
177 spin_unlock_irqrestore(&ochip->lock, flags); in orion_gpio_direction_input()
203 return -EINVAL; in orion_gpio_direction_output()
205 spin_lock_irqsave(&ochip->lock, flags); in orion_gpio_direction_output()
209 spin_unlock_irqrestore(&ochip->lock, flags); in orion_gpio_direction_output()
219 spin_lock_irqsave(&ochip->lock, flags); in orion_gpio_set()
221 spin_unlock_irqrestore(&ochip->lock, flags); in orion_gpio_set()
228 return irq_create_mapping(ochip->domain, in orion_gpio_to_irq()
229 ochip->secondary_irq_base + pin); in orion_gpio_to_irq()
233 * Orion-specific GPIO API extensions.
241 struct gpio_chip *chip = &ochip->chip; in orion_gpio_chip_find()
243 if (pin >= chip->base && pin < chip->base + chip->ngpio) in orion_gpio_chip_find()
257 pin -= ochip->chip.base; in orion_gpio_set_unused()
271 pin -= ochip->chip.base; in orion_gpio_set_valid()
277 __set_bit(pin, &ochip->valid_input); in orion_gpio_set_valid()
279 __clear_bit(pin, &ochip->valid_input); in orion_gpio_set_valid()
282 __set_bit(pin, &ochip->valid_output); in orion_gpio_set_valid()
284 __clear_bit(pin, &ochip->valid_output); in orion_gpio_set_valid()
295 spin_lock_irqsave(&ochip->lock, flags); in orion_gpio_set_blink()
298 spin_unlock_irqrestore(&ochip->lock, flags); in orion_gpio_set_blink()
307 unsigned gpio = desc_to_gpio(desc); in orion_gpio_led_blink_set() local
315 orion_gpio_set_blink(gpio, 0); in orion_gpio_led_blink_set()
319 orion_gpio_set_blink(gpio, 1); in orion_gpio_led_blink_set()
327 * Orion GPIO IRQ
336 * Both-edge handlers: Similar to regular Edge handlers, but also swaps
341 * Every eight GPIO lines are grouped (OR'ed) before going up to main
345 * data-in /--------| |-----| |----\
346 * -----| |----- ---- to main cause reg
347 * X \----------------| |----/
356 struct orion_gpio_chip *ochip = gc->private; in gpio_irq_set_type()
360 pin = d->hwirq - ochip->secondary_irq_base; in gpio_irq_set_type()
364 return -EINVAL; in gpio_irq_set_type()
369 return -EINVAL; in gpio_irq_set_type()
372 if (!(ct->type & type)) in gpio_irq_set_type()
374 return -EINVAL; in gpio_irq_set_type()
417 for (i = 0; i < ochip->chip.ngpio; i++) { in gpio_irq_handler()
420 irq = ochip->secondary_irq_base + i; in gpio_irq_handler()
427 /* Swap polarity (race with GPIO line) */ in gpio_irq_handler()
465 seq_printf(s, " gpio-%-3d (%-20.20s)", chip->base + i, label); in orion_gpio_dbg_show()
474 seq_printf(s, " in %s (act %s) - IRQ", in orion_gpio_dbg_show()
497 u32 mask = d->mask; in orion_gpio_unmask_irq()
500 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_unmask_irq()
502 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_unmask_irq()
510 u32 mask = d->mask; in orion_gpio_mask_irq()
514 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_mask_irq()
516 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_mask_irq()
538 ochip->chip.label = kstrdup(gc_label, GFP_KERNEL); in orion_gpio_init()
539 ochip->chip.request = orion_gpio_request; in orion_gpio_init()
540 ochip->chip.direction_input = orion_gpio_direction_input; in orion_gpio_init()
541 ochip->chip.get = orion_gpio_get; in orion_gpio_init()
542 ochip->chip.direction_output = orion_gpio_direction_output; in orion_gpio_init()
543 ochip->chip.set = orion_gpio_set; in orion_gpio_init()
544 ochip->chip.to_irq = orion_gpio_to_irq; in orion_gpio_init()
545 ochip->chip.base = gpio_base; in orion_gpio_init()
546 ochip->chip.ngpio = ngpio; in orion_gpio_init()
547 ochip->chip.can_sleep = 0; in orion_gpio_init()
548 ochip->chip.dbg_show = orion_gpio_dbg_show; in orion_gpio_init()
550 spin_lock_init(&ochip->lock); in orion_gpio_init()
551 ochip->base = (void __iomem *)base; in orion_gpio_init()
552 ochip->valid_input = 0; in orion_gpio_init()
553 ochip->valid_output = 0; in orion_gpio_init()
554 ochip->mask_offset = mask_offset; in orion_gpio_init()
555 ochip->secondary_irq_base = secondary_irq_base; in orion_gpio_init()
557 gpiochip_add_data(&ochip->chip, ochip); in orion_gpio_init()
560 * Mask and clear GPIO interrupts. in orion_gpio_init()
567 * interrupt handlers, with each handler dealing with 8 GPIO in orion_gpio_init()
580 ochip->base, handle_level_irq); in orion_gpio_init()
581 gc->private = ochip; in orion_gpio_init()
582 ct = gc->chip_types; in orion_gpio_init()
583 ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF; in orion_gpio_init()
584 ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW; in orion_gpio_init()
585 ct->chip.irq_mask = orion_gpio_mask_irq; in orion_gpio_init()
586 ct->chip.irq_unmask = orion_gpio_unmask_irq; in orion_gpio_init()
587 ct->chip.irq_set_type = gpio_irq_set_type; in orion_gpio_init()
588 ct->chip.name = ochip->chip.label; in orion_gpio_init()
591 ct->regs.mask = ochip->mask_offset + GPIO_EDGE_MASK_OFF; in orion_gpio_init()
592 ct->regs.ack = GPIO_EDGE_CAUSE_OFF; in orion_gpio_init()
593 ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; in orion_gpio_init()
594 ct->chip.irq_ack = irq_gc_ack_clr_bit; in orion_gpio_init()
595 ct->chip.irq_mask = orion_gpio_mask_irq; in orion_gpio_init()
596 ct->chip.irq_unmask = orion_gpio_unmask_irq; in orion_gpio_init()
597 ct->chip.irq_set_type = gpio_irq_set_type; in orion_gpio_init()
598 ct->handler = handle_edge_irq; in orion_gpio_init()
599 ct->chip.name = ochip->chip.label; in orion_gpio_init()
605 ochip->domain = irq_domain_add_legacy(NULL, in orion_gpio_init()
606 ochip->chip.ngpio, in orion_gpio_init()
607 ochip->secondary_irq_base, in orion_gpio_init()
608 ochip->secondary_irq_base, in orion_gpio_init()
611 if (!ochip->domain) in orion_gpio_init()
613 ochip->chip.label); in orion_gpio_init()