Home
last modified time | relevance | path

Searched +full:omap4 +full:- +full:hwspinlock (Results 1 – 25 of 28) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/hwlock/
H A Dti,omap-hwspinlock.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI HwSpinlock for OMAP and K3 based SoCs
10 - Suman Anna <s-anna@ti.com>
15 - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
16 - ti,am64-hwspinlock # for K3 AM64x SoCs
17 - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs
22 "#hwlock-cells":
[all …]
/openbmc/linux/drivers/hwspinlock/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 # Generic HWSPINLOCK framework
6 menuconfig HWSPINLOCK config
9 if HWSPINLOCK
16 introduced in OMAP4).
66 endif # HWSPINLOCK
H A Domap_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2010-2021 Texas Instruments Incorporated - https://www.ti.com
8 * Hari Kanigeri <h-kanigeri2@ti.com>
9 * Ohad Ben-Cohen <ohad@wizery.com>
10 * Suman Anna <s-anna@ti.com>
22 #include <linux/hwspinlock.h>
38 static int omap_hwspinlock_trylock(struct hwspinlock *lock) in omap_hwspinlock_trylock()
40 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_trylock()
46 static void omap_hwspinlock_unlock(struct hwspinlock *lock) in omap_hwspinlock_unlock()
48 void __iomem *lock_addr = lock->priv; in omap_hwspinlock_unlock()
[all …]
/openbmc/linux/Documentation/locking/
H A Dhwspinlock.rst12 For example, OMAP4 has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP,
17 A generic hwspinlock framework allows platform-independent drivers to use
18 the hwspinlock device in order to access data structures that are shared
22 This is necessary, for example, for Inter-processor communications:
23 on OMAP4, cpu-intensive multimedia tasks are offloaded by the host to the
26 To achieve fast message-based communications, a minimal kernel support
31 the remote processors, and access to it is synchronized using the hwspinlock
35 A common hwspinlock interface makes it possible to have generic, platform-
43 struct hwspinlock *hwspin_lock_request(void);
45 Dynamically assign an hwspinlock and return its address, or NULL
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dam4372.dtsi4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&wakeupgen>;
32 #address-cells = <1>;
33 #size-cells = <0>;
35 compatible = "arm,cortex-a9";
40 clock-names = "cpu";
42 clock-latency = <300000>; /* From omap-cpufreq driver */
46 gic: interrupt-controller@48241000 {
[all …]
H A Dam33xx.dtsi4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
13 #include <dt-bindings/clock/am3.h>
17 interrupt-parent = <&intc>;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 d-can0 = &dcan0;
33 d-can1 = &dcan1;
45 #address-cells = <1>;
[all …]
H A Ddm816x.dtsi7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/omap.h>
12 interrupt-parent = <&intc>;
13 #address-cells = <1>;
14 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
31 compatible = "arm,cortex-a8";
38 compatible = "arm,cortex-a8-pmu";
47 compatible = "ti,omap-infra";
[all …]
H A Ddra7.dtsi2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on "omap4.dtsi"
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&gic>;
55 gic: interrupt-controller@48211000 {
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
H A Domap4-l4.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
4 power-domains = <&prm_core>;
6 clock-names = "fck";
10 reg-names = "ap", "la", "ia0";
11 #address-cells = <1>;
12 #size-cells = <1>;
22 compatible = "simple-pm-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Domap5-l4.dtsi2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_core>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
21 compatible = "simple-pm-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
55 target-module@2000 { /* 0x4a002000, ap 3 44.0 */
[all …]
H A Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
H A Ddra7-l4.dtsi2 compatible = "ti,dra7-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_coreaon>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
17 compatible = "simple-pm-bus";
18 #address-cells = <1>;
19 #size-cells = <1>;
50 target-module@2000 { /* 0x4a002000, ap 3 08.0 */
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
[all …]
H A Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
[all …]
H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
H A Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
[all …]
H A Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
[all …]
/openbmc/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]
H A Dopengrok1.0.log1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c'
2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms)
3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa
[all...]
H A Dopengrok0.0.log1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz'
2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz'
3 2024-12-2
[all...]

12