Home
last modified time | relevance | path

Searched +full:omap4 +full:- +full:dsp (Results 1 – 25 of 44) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: OMAP4+ Remoteproc Devices
10 - Suman Anna <s-anna@ti.com>
13 The OMAP family of SoCs usually have one or more slave processor sub-systems
14 that are used to offload some of the processor-intensive tasks, or to manage
17 The processor cores in the sub-system are usually behind an IOMMU, and may
18 contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iommu/
H A Dti,omap-iommu.txt4 - compatible : Should be one of,
5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
7 "ti,dra7-dsp-iommu" for DRA7xx DSP IOMMU instances
8 "ti,dra7-iommu" for DRA7xx IOMMU instances
9 - ti,hwmods : Name of the hwmod associated with the IOMMU instance
10 - reg : Address space for the configuration registers
11 - interrupts : Interrupt specifier for the IOMMU instance
12 - #iommu-cells : Should be 0. OMAP IOMMUs are all "single-master" devices,
19 - ti,#tlb-entries : Number of entries in the translation look-aside buffer.
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
14 compatible = "ti,omap4430", "ti,omap4";
15 interrupt-parent = <&wakeupgen>;
[all …]
H A Domap4-l4-abe.dtsi2 compatible = "ti,omap4-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP4_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
[all …]
H A Domap5-l4-abe.dtsi2 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP5_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
[all …]
H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
[all …]
H A Ddra7xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 atl_clkin0_ck: clock-atl-clkin0 {
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
11 clock-output-names = "atl_clkin0_ck";
15 atl_clkin1_ck: clock-atl-clkin1 {
16 #clock-cells = <0>;
17 compatible = "ti,dra7-atl-clock";
18 clock-output-names = "atl_clkin1_ck";
22 atl_clkin2_ck: clock-atl-clkin2 {
[all …]
H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
12 #include <dt-bindings/clock/dra7.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Ddm816x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include <dt-bindings/bus/ti-sysc.h>
4 #include <dt-bindings/clock/dm816.h>
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/omap.h>
10 interrupt-parent = <&intc>;
11 #address-cells = <1>;
12 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
/openbmc/linux/drivers/remoteproc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 Support for remote processors (such as DSP coprocessors). These
38 tristate "i.MX DSP remoteproc support"
43 Say y here to support iMX's DSP remote processors via the remote
54 This can be either built-in or a loadable module.
75 and DSP on OMAP4) via the remote processor framework.
77 Currently only supported on OMAP4.
80 use-cases to run on your platform (multimedia codecs are
81 offloaded to remote DSP processors using this framework).
105 Required for Suspend-to-RAM on AM33xx and AM43xx SoCs. Also needed
[all …]
H A Dda8xx_remoteproc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Remote processor machine-specific module for DA8XX
26 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
29 * OMAP-L138 Technical References:
30 * http://www.ti.com/product/omap-l138
38 #define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
41 * struct da8xx_rproc_mem - internal memory structure
44 * @dev_addr: Device address of the memory region from DSP view
55 * struct da8xx_rproc - da8xx remote processor instance state
59 * @dsp_clk: placeholder for platform's DSP clk
[all …]
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dti,timer-dm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual-mode timer
10 - Tony Lindgren <tony@atomide.com>
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
18 - items:
19 - enum:
20 - ti,am335x-timer
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
59 phandle to the intended sub-mailbox child node to be used for communication.
60 The equivalent "mbox-names" property value can be used to give a name to the
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Ddra74x.dtsi2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on "omap4.dtsi"
18 compatible = "arm,cortex-a15";
20 operating-points-v2 = <&cpu0_opp_table>;
25 compatible = "arm,cortex-a15-pmu";
26 interrupt-parent = <&wakeupgen>;
42 #address-cells = <1>;
43 #size-cells = <1>;
44 utmi-mode = <2>;
53 interrupt-names = "peripheral",
[all …]
H A Ddra7.dtsi2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
7 * Based on "omap4.dtsi"
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&gic>;
55 gic: interrupt-controller@48211000 {
[all …]
/openbmc/linux/arch/arm/mach-omap2/
H A Dcm2xxx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc.
6 * Copyright (C) 2007-2010 Nokia Corporation
10 * other. The CM modules/instances on OMAP4 are quite different, so
16 #include "prcm-common.h"
30 /* OMAP2-specific register offsets */
53 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,
H A Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP4 PRM instance functions
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
116 * Some IPs like dsp, ipu or iva contain processors that require an HW
[all …]
H A Dpdata-quirks.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/platform_data/pinctrl-single.h>
21 #include <linux/platform_data/hsmmc-omap.h>
22 #include <linux/platform_data/iommu-omap.h>
23 #include <linux/platform_data/ti-sysc.h>
25 #include <linux/platform_data/asoc-ti-mcbsp.h>
26 #include <linux/platform_data/ti-prm.h>
30 #include "common-board-devices.h"
33 #include "omap-secure.h"
58 * Note that if the pins are used for MMC1, pbias-regulator
[all …]
H A Domap_hwmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
15 * ------------
19 * etc. Some of these devices, like the DSP, are created by TI;
21 * TI's documentation, on-chip devices are referred to as "OMAP
26 * Most of the address and data flow between modules is via OCP-based
32 * OMAP hwmod provides a consistent way to describe the on-chip
42 * -----------
54 * +-------------------------------+
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
[all …]
/openbmc/linux/Documentation/staging/
H A Drpmsg.rst17 flavor of real-time OS.
19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
20 Typically, the dual cortex-A9 is running Linux in a SMP configuration,
21 and each of the other three cores (two M3 cores and a DSP) is running
24 Typically AMP remote processors employ dedicated DSP codecs and multimedia
25 hardware accelerators, and therefore are often used to offload CPU-intensive
28 These remote processors could also be used to control latency-sensitive
34 hardware accessible only by the remote processor, reserving kernel-controlled
37 Rpmsg is a virtio-based messaging bus that allows kernel drivers to communicate
44 OMAP4, remote cores and hardware accelerators may have direct access to the
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
13 - dma-requests: Number of DMA requests the controller can handle
16 - ti,dma-safe-map: Safe routing value for unused request lines
17 - ti,reserved-dma-request-ranges: DMA request ranges which should not be used
[all …]
/openbmc/linux/drivers/mailbox/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
79 interprocessor communication involving DSP, IVA1.0 and IVA2 in
80 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
96 This driver provides support for inter-processor communication
155 between application processors and other processors/MCU/DSP. Select
184 module will be called mailbox-mpfs.
193 providing an interface for invoking the inter-process communication
[all …]
/openbmc/linux/Documentation/locking/
H A Dhwspinlock.rst12 For example, OMAP4 has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP,
14 is usually running Linux and the slave processors, the M3 and the DSP,
17 A generic hwspinlock framework allows platform-independent drivers to use
22 This is necessary, for example, for Inter-processor communications:
23 on OMAP4, cpu-intensive multimedia tasks are offloaded by the host to the
26 To achieve fast message-based communications, a minimal kernel support
35 A common hwspinlock interface makes it possible to have generic, platform-
67 Retrieve the global lock id for an OF phandle-based specific lock.
72 The function returns a lock id number on success, -EPROBE_DEFER if
82 Free a previously-assigned hwspinlock; returns 0 on success, or an
[all …]

12