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/openbmc/linux/arch/arm/mach-omap2/
H A Domap_device.c44 static void omap_device_delete(struct omap_device *od);
50 static void _add_clkdev(struct omap_device *od, const char *clk_alias, in _add_clkdev() argument
59 dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name); in _add_clkdev()
61 r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias); in _add_clkdev()
63 dev_dbg(&od->pdev->dev, in _add_clkdev()
79 dev_name(&od->pdev->dev)); in _add_clkdev()
81 rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev), in _add_clkdev()
87 dev_err(&od->pdev->dev, in _add_clkdev()
90 dev_err(&od->pdev->dev, in _add_clkdev()
98 * @od: struct omap_device *od
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/openbmc/linux/drivers/dma/ti/
H A Domap-dma.c253 struct omap_dmadev *od = to_omap_dma_dev(vd->tx.chan->device); in omap_dma_desc_free() local
258 dma_pool_free(od->desc_pool, d->sg[i].t2_desc, in omap_dma_desc_free()
351 static void omap_dma_glbl_write(struct omap_dmadev *od, unsigned reg, unsigned val) in omap_dma_glbl_write() argument
353 const struct omap_dma_reg *r = od->reg_map + reg; in omap_dma_glbl_write()
357 omap_dma_write(val, r->type, od->base + r->offset); in omap_dma_glbl_write()
360 static unsigned omap_dma_glbl_read(struct omap_dmadev *od, unsigned reg) in omap_dma_glbl_read() argument
362 const struct omap_dma_reg *r = od->reg_map + reg; in omap_dma_glbl_read()
366 return omap_dma_read(r->type, od->base + r->offset); in omap_dma_glbl_read()
401 static void omap_dma_clear_lch(struct omap_dmadev *od, int lch) in omap_dma_clear_lch() argument
406 c = od->lch_map[lch]; in omap_dma_clear_lch()
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/openbmc/linux/drivers/dma/
H A Dowl-dma.c266 static void dma_update(struct owl_dma *od, u32 reg, u32 val, bool state) in dma_update() argument
270 regval = readl(od->base + reg); in dma_update()
277 writel(regval, od->base + reg); in dma_update()
280 static void dma_writel(struct owl_dma *od, u32 reg, u32 data) in dma_writel() argument
282 writel(data, od->base + reg); in dma_writel()
285 static u32 dma_readl(struct owl_dma *od, u32 reg) in dma_readl() argument
287 return readl(od->base + reg); in dma_readl()
342 static void owl_dma_free_lli(struct owl_dma *od, in owl_dma_free_lli() argument
346 dma_pool_free(od->lli_pool, lli, lli->phys); in owl_dma_free_lli()
349 static struct owl_dma_lli *owl_dma_alloc_lli(struct owl_dma *od) in owl_dma_alloc_lli() argument
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H A Dbcm2835-dma.c697 struct bcm2835_dmadev *od = to_bcm2835_dma_dev(chan->device); in bcm2835_dma_prep_dma_cyclic() local
750 if (buf_addr == od->zero_page && !c->is_lite_channel) in bcm2835_dma_prep_dma_cyclic()
842 static void bcm2835_dma_free(struct bcm2835_dmadev *od) in bcm2835_dma_free() argument
846 list_for_each_entry_safe(c, next, &od->ddev.channels, in bcm2835_dma_free()
852 dma_unmap_page_attrs(od->ddev.dev, od->zero_page, PAGE_SIZE, in bcm2835_dma_free()
880 struct bcm2835_dmadev *od; in bcm2835_dma_probe() local
898 od = devm_kzalloc(&pdev->dev, sizeof(*od), GFP_KERNEL); in bcm2835_dma_probe()
899 if (!od) in bcm2835_dma_probe()
908 od->base = base; in bcm2835_dma_probe()
910 dma_cap_set(DMA_SLAVE, od->ddev.cap_mask); in bcm2835_dma_probe()
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/openbmc/linux/fs/orangefs/
H A Ddir.c62 struct orangefs_dir *od, struct dentry *dentry, in do_readdir() argument
76 op->upcall.req.readdir.token = od->token; in do_readdir()
83 od->error = bufi; in do_readdir()
100 od->error = r; in do_readdir()
107 od->error = r; in do_readdir()
111 od->error = op->downcall.status; in do_readdir()
121 od->error = -EIO; in do_readdir()
127 od->token = resp->token; in do_readdir()
131 static int parse_readdir(struct orangefs_dir *od, in parse_readdir() argument
138 part = od->part; in parse_readdir()
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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,od.yaml4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,od.yaml#
14 Mediatek display overdrive, namely OD, increases the transition values
16 OD device node must be siblings to the central MMSYS_CONFIG node.
25 - mediatek,mt2712-disp-od
26 - mediatek,mt8173-disp-od
28 - const: mediatek,mt6795-disp-od
29 - const: mediatek,mt8173-disp-od
39 - description: OD Clock
56 od@14023000 {
57 compatible = "mediatek,mt8173-disp-od";
/openbmc/u-boot/board/freescale/common/
H A Dics307_clk.c38 /* decode S[0-2] to Output Divider (OD) */
46 * the result will be retuned with component RDW, VDW, OD, TTL,
52 unsigned long vdw, rdw, odp, s_vdw = 0, s_rdw = 0, s_odp = 0, od; in ics307_sysclk_calculator() local
57 od = ics307_s_to_od[odp]; in ics307_sysclk_calculator()
58 if (od * out_freq < MIN_VCO || od * out_freq > MAX_VCO) in ics307_sysclk_calculator()
62 vdw = out_freq * 1000 * od * rdw / (input_freq * 2); in ics307_sysclk_calculator()
68 tmp_out = input_freq * 2 * vdw / (rdw * od * 1000); in ics307_sysclk_calculator()
91 debug("ICS307-02: RDW: %ld, VDW: %ld, OD: %d\n", s_rdw - 2, s_vdw - 8, in ics307_sysclk_calculator()
105 unsigned long od = ics307_s_to_od[cw0 & 0x7]; in ics307_clk_freq() local
109 * CLK1 Freq = Input Frequency * 2 * (VDW + 8) / ((RDW + 2) * OD) in ics307_clk_freq()
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/openbmc/linux/fs/overlayfs/
H A Dreaddir.c238 static void ovl_cache_put(struct ovl_dir_file *od, struct inode *inode) in ovl_cache_put() argument
240 struct ovl_dir_cache *cache = od->cache; in ovl_cache_put()
324 struct ovl_dir_file *od = file->private_data; in ovl_dir_reset() local
325 struct ovl_dir_cache *cache = od->cache; in ovl_dir_reset()
330 ovl_cache_put(od, inode); in ovl_dir_reset()
331 od->cache = NULL; in ovl_dir_reset()
332 od->cursor = NULL; in ovl_dir_reset()
335 if (od->is_real != is_real) { in ovl_dir_reset()
339 od->is_real = false; in ovl_dir_reset()
379 static void ovl_seek_cursor(struct ovl_dir_file *od, loff_t pos) in ovl_seek_cursor() argument
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dst-pincfg.h19 #define OD (1 << 25) macro
30 /* oe = 0, pu = 0, od = 0 */
32 /* oe = 0, pu = 1, od = 0 */
34 /* oe = 1, pu = 0, od = 0 */
36 /* oe = 1, pu = 0, od = 1 */
37 #define BIDIR (OE | OD)
38 /* oe = 1, pu = 1, od = 1 */
39 #define BIDIR_PU (OE | PU | OD)
/openbmc/u-boot/arch/arm/dts/
H A Dst-pincfg.h18 #define OD (1 << 25) macro
29 /* oe = 0, pu = 0, od = 0 */
31 /* oe = 0, pu = 1, od = 0 */
33 /* oe = 1, pu = 0, od = 0 */
35 /* oe = 1, pu = 0, od = 1 */
36 #define BIDIR (OE | OD)
37 /* oe = 1, pu = 1, od = 1 */
38 #define BIDIR_PU (OE | PU | OD)
/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-sti.c26 #define OD (1 << 25) macro
29 /* oe = 0, pu = 0, od = 0 */
31 /* oe = 0, pu = 1, od = 0 */
33 /* oe = 1, pu = 0, od = 0 */
35 /* oe = 1, pu = 1, od = 0 */
37 /* oe = 1, pu = 0, od = 1 */
38 #define BIDIR (OE | OD)
39 /* oe = 1, pu = 1, od = 1 */
40 #define BIDIR_PU (OE | PU | OD)
94 int oe = 0, pu = 0, od = 0; in sti_pin_configure() local
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/openbmc/linux/drivers/scsi/libsas/
H A Dsas_host_smp.c53 * to_sas_gpio_gp_bit - given the gpio frame data find the byte/bit position of 'od'
54 * @od: od bit to find
58 * @bit: bit position of 'od' in the returned byte
60 * returns NULL if 'od' is not in 'data'
70 * although 'od' is renamed 'id' for 'input data'.
72 * SFF-8489 defines the behavior of the LEDs in response to the 'od' values.
74 static u8 *to_sas_gpio_gp_bit(unsigned int od, u8 *data, u8 index, u8 count, u8 *bit) in to_sas_gpio_gp_bit() argument
84 if (od < index * 32) in to_sas_gpio_gp_bit()
87 od -= index * 32; in to_sas_gpio_gp_bit()
88 reg = od >> 5; in to_sas_gpio_gp_bit()
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/openbmc/linux/drivers/usb/serial/
H A Domninet.c115 struct omninet_data *od; in omninet_port_probe() local
117 od = kzalloc(sizeof(*od), GFP_KERNEL); in omninet_port_probe()
118 if (!od) in omninet_port_probe()
121 usb_set_serial_port_data(port, od); in omninet_port_probe()
128 struct omninet_data *od; in omninet_port_remove() local
130 od = usb_get_serial_port_data(port); in omninet_port_remove()
131 kfree(od); in omninet_port_remove()
158 struct omninet_data *od = usb_get_serial_port_data(port); in omninet_prepare_write_buffer() local
166 header->oh_seq = od->od_outseq++; in omninet_prepare_write_buffer()
/openbmc/linux/arch/arm64/crypto/
H A Dsha1-ce-core.S96 add_update c, od, k0, 9, 10, 11, 8
98 add_update c, od, k0, 11, 8, 9, 10
101 add_update p, od, k1, 9, 10, 11, 8
103 add_update p, od, k1, 11, 8, 9, 10
105 add_update p, od, k2, 9, 10, 11, 8
108 add_update m, od, k2, 11, 8, 9, 10
110 add_update m, od, k2, 9, 10, 11, 8
113 add_update p, od, k3, 11, 8, 9, 10
115 add_only p, od, k3, 10
117 add_only p, od
/openbmc/linux/drivers/clk/baikal-t1/
H A Dccu-pll.c77 unsigned long od) in ccu_pll_calc_freq() argument
83 do_div(tmp, od); in ccu_pll_calc_freq()
156 unsigned long nr, nf, od; in ccu_pll_recalc_rate() local
162 od = FIELD_GET(CCU_PLL_CTL_CLKOD_MASK, val) + 1; in ccu_pll_recalc_rate()
164 return ccu_pll_calc_freq(parent_rate, nr, nf, od); in ccu_pll_recalc_rate()
169 unsigned long *od) in ccu_pll_calc_factors() argument
184 * Find a closest [nr;nf;od] vector taking into account the in ccu_pll_calc_factors()
185 * limitations like: 1) 700MHz <= Fvco <= 3.5GHz, 2) PLL Od is in ccu_pll_calc_factors()
190 /* Use Od factor to fulfill the limitation 2). */ in ccu_pll_calc_factors()
226 *od = CCU_PLL_CLKOD_FACTOR * d1; in ccu_pll_calc_factors()
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/openbmc/u-boot/board/synopsys/iot_devkit/
H A Diot_devkit.c49 /* pll_off=1, M=25, N=1, OD=3, PLL_OUT_CLK=50M */ in set_cpu_freq()
51 /* pll_off=0, M=25, N=1, OD=3, PLL_OUT_CLK=50M */ in set_cpu_freq()
57 /* pll_off=1, M=18, N=1, OD=2, PLL_OUT_CLK=72M */ in set_cpu_freq()
59 /* pll_off=0, M=18, N=1, OD=2, PLL_OUT_CLK=72M */ in set_cpu_freq()
65 /* pll_off=1,M=25, N=1, OD=2, PLL_OUT_CLK=100M */ in set_cpu_freq()
67 /* pll_off=0,M=25, N=1, OD=2, PLL_OUT_CLK=100M */ in set_cpu_freq()
73 /* pll_off=1, M=17, N=1, OD=1, PLL_OUT_CLK=136M */ in set_cpu_freq()
75 /* pll_off=0, M=17, N=1, OD=1, PLL_OUT_CLK=136M */ in set_cpu_freq()
81 /* pll_off=1, M=18, N=1, OD=1, PLL_OUT_CLK=144M */ in set_cpu_freq()
83 /* pll_off=0, M=18, N=1, OD=1, PLL_OUT_CLK=144M */ in set_cpu_freq()
/openbmc/qemu/docs/spin/
H A Daio_notify_bug.promela46 od;
86 od;
95 od;
103 od;
125 od;
129 :: !event && notifier_done -> do :: true -> skip; od;
H A Daio_notify_accept.promela66 od;
96 od;
107 od;
115 od;
137 od;
141 :: !event && notifier_done -> do :: true -> skip; od;
H A Daio_notify.promela50 od;
58 od
81 od;
85 od;
92 od;
H A Dtcg-exclusive.promela82 od
99 od; \
104 od; \
198 od;
224 od;
/openbmc/u-boot/drivers/video/meson/
H A Dmeson_vclk.c373 static inline unsigned int pll_od_to_reg(unsigned int od) in pll_od_to_reg() argument
375 switch (od) { in pll_od_to_reg()
531 unsigned int *od) in meson_hdmi_pll_find_params() argument
534 for (*od = 16 ; *od > 1 ; *od >>= 1) { in meson_hdmi_pll_find_params()
535 *m = meson_hdmi_pll_get_m(priv, freq * *od); in meson_hdmi_pll_find_params()
538 *frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od); in meson_hdmi_pll_find_params()
540 debug("PLL params for %dkHz: m=%x frac=%x od=%d\n", in meson_hdmi_pll_find_params()
541 freq, *m, *frac, *od); in meson_hdmi_pll_find_params()
550 /* pll_freq is the frequency after the OD dividers */
554 unsigned int od, m, frac; in meson_vclk_dmt_supported_freq() local
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/openbmc/linux/drivers/video/fbdev/kyro/
H A DSTG4000InitDevice.c121 u32 R = 0, F = 0, OD = 0, ODIndex = 0; in ProgramClock() local
144 OD = ODValues[ODIndex]; in ProgramClock()
150 ulTmp = R * (ulScaleClockReq << OD); in ProgramClock()
152 /* F = ClkRequired * R * (2^OD) / Fref */ in ProgramClock()
162 * achievable with current OD & R) let's iterate in ProgramClock()
181 ulTmp = (ulVCO >> OD); /* Clock = VCO / (2^OD) */ in ProgramClock()
192 ulBestOD = OD; in ProgramClock()
207 if ((ulScore >= ulBestScore) && (OD > 0)) { in ProgramClock()
208 ulBestOD = OD; in ProgramClock()
/openbmc/linux/drivers/clk/ingenic/
H A Dcgu.c86 unsigned m, n, od, od_enc = 0; in ingenic_pll_recalc_rate() local
114 for (od = 0; od < pll_info->od_max; od++) in ingenic_pll_recalc_rate()
115 if (pll_info->od_encoding[od] == od_enc) in ingenic_pll_recalc_rate()
118 /* if od_max = 0, od_bits should be 0 and od is fixed to 1. */ in ingenic_pll_recalc_rate()
122 BUG_ON(od == pll_info->od_max); in ingenic_pll_recalc_rate()
123 od++; in ingenic_pll_recalc_rate()
126 n * od); in ingenic_pll_recalc_rate()
134 unsigned int m, n, od = 1; in ingenic_pll_calc_m_n_od() local
144 m = (rate / MHZ) * od * n / (parent_rate / MHZ); in ingenic_pll_calc_m_n_od()
150 *pod = od; in ingenic_pll_calc_m_n_od()
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/openbmc/linux/fs/ocfs2/
H A Dquota_local.c872 struct ocfs2_dquot *od = private; in olq_set_dquot() local
874 struct super_block *sb = od->dq_dquot.dq_sb; in olq_set_dquot()
877 + ol_dqblk_block_offset(sb, od->dq_local_off)); in olq_set_dquot()
880 od->dq_dquot.dq_id)); in olq_set_dquot()
881 spin_lock(&od->dq_dquot.dq_dqb_lock); in olq_set_dquot()
882 dqblk->dqb_spacemod = cpu_to_le64(od->dq_dquot.dq_dqb.dqb_curspace - in olq_set_dquot()
883 od->dq_origspace); in olq_set_dquot()
884 dqblk->dqb_inodemod = cpu_to_le64(od->dq_dquot.dq_dqb.dqb_curinodes - in olq_set_dquot()
885 od->dq_originodes); in olq_set_dquot()
886 spin_unlock(&od->dq_dquot.dq_dqb_lock); in olq_set_dquot()
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/openbmc/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c473 static inline unsigned int pll_od_to_reg(unsigned int od) in pll_od_to_reg() argument
475 switch (od) { in pll_od_to_reg()
700 unsigned int *od) in meson_hdmi_pll_find_params() argument
703 for (*od = 16 ; *od > 1 ; *od >>= 1) { in meson_hdmi_pll_find_params()
704 *m = meson_hdmi_pll_get_m(priv, freq * *od); in meson_hdmi_pll_find_params()
707 *frac = meson_hdmi_pll_get_frac(priv, *m, freq * *od); in meson_hdmi_pll_find_params()
709 DRM_DEBUG_DRIVER("PLL params for %dkHz: m=%x frac=%x od=%d\n", in meson_hdmi_pll_find_params()
710 freq, *m, *frac, *od); in meson_hdmi_pll_find_params()
719 /* pll_freq is the frequency after the OD dividers */
723 unsigned int od, m, frac; in meson_vclk_dmt_supported_freq() local
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