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/openbmc/u-boot/arch/nios2/include/asm/bitops/
H A Dnon-atomic.h7 * __set_bit - Set a bit in memory
11 * Unlike set_bit(), this function is non-atomic and may be reordered.
15 static inline void __set_bit(int nr, volatile unsigned long *addr) in __set_bit()
25 static inline void __clear_bit(int nr, volatile unsigned long *addr) in __clear_bit()
36 * __change_bit - Toggle a bit in memory
40 * Unlike change_bit(), this function is non-atomic and may be reordered.
44 static inline void __change_bit(int nr, volatile unsigned long *addr) in __change_bit()
53 * __test_and_set_bit - Set a bit and return its old value
57 * This operation is non-atomic and can be reordered.
61 static inline int __test_and_set_bit(int nr, volatile unsigned long *addr) in __test_and_set_bit()
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H A Datomic.h16 …ne ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
51 * set_bit - Atomically set a bit in memory
59 * on non x86 architectures, so if you are writing portable code,
63 * restricted to acting on a single-word quantity.
65 static inline void set_bit(int nr, volatile unsigned long *addr) in set_bit()
77 * clear_bit - Clears a bit in memory
86 static inline void clear_bit(int nr, volatile unsigned long *addr) in clear_bit()
98 * change_bit - Toggle a bit in memory
105 * restricted to acting on a single-word quantity.
107 static inline void change_bit(int nr, volatile unsigned long *addr) in change_bit()
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/openbmc/openbmc-test-automation/ipmi/
H A Dtest_ipmi_sol.robot20 @{setinprogress} set-complete set-in-progress commit-write
67 Set SOL Setting privilege-level ${item}
79 ... sol set privilege-level ${value}
91 ... sol set retry-count ${value}
103 ... sol set retry-interval ${value}
115 ... sol set character-accumulate-leve
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H A Dtest_ipmi_general.robot45 ${uuid}= Remove String ${uuid} -
63 # [channel_protocol_type]: IPMB-1.0
64 # [session_support]: multi-session
67 # [volatile(active)_settings]:
69 # [per-message_auth]: enabled
72 # [Non-Volatile Settings]:
74 # [per-message_auth]: enabled
102 # Verify volatile(activ
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DPersistentMemory.interface.yaml4 - name: ModuleManufacturerID
8 JEP-106.
9 - name: ModuleProductID
12 The product ID of this memory module as defined by JEDEC in JEP-106.
13 - name: SubsystemVendorID
17 module as defined by JEDEC in JEP-106.
18 - name: SubsystemDeviceID
22 moduleas defined by JEDEC in JEP-106.
23 - name: VolatileRegionSizeLimitInKiB
26 Total size of volatile regions in kibibytes (KiB).
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H A DDimm.interface.yaml4 - name: MemoryDataWidth
8 - name: MemorySizeInKB
12 - name: MemoryDeviceLocator
16 - name: MemoryType
20 - name: MemoryTypeDetail
24 - name: MaxMemorySpeedInMhz
28 - name: MemoryAttributes
33 - name: MemoryConfiguredSpeedInMhz
37 - name: ECC
40 Error-Correcting Code.
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/openbmc/qemu/subprojects/libvhost-user/include/
H A Dcompiler.h4 * See the COPYING file in the top-level directory.
45 const typeof(((type *) 0)->member) *__mptr = (ptr); \
46 (type *) ((char *) __mptr - offsetof(type, member));})
49 #define sizeof_field(type, field) sizeof(((type *)0)->field)
61 -offsetof(type, field)]; \
64 #define typeof_field(type, field) typeof(((type *)0)->field)
65 #define type_check(t1,t2) ((t1*)0 - (t2*)0)
69 int:(x) ? -1 : 1; \
76 #define QEMU_BUILD_BUG_ON_ZERO(x) (sizeof(QEMU_BUILD_BUG_ON_STRUCT(x)) - \
88 #define __has_warning(x) 0 /* compatibility with non
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/openbmc/qemu/subprojects/libvduse/include/
H A Dcompiler.h4 * See the COPYING file in the top-level directory.
45 const typeof(((type *) 0)->member) *__mptr = (ptr); \
46 (type *) ((char *) __mptr - offsetof(type, member));})
49 #define sizeof_field(type, field) sizeof(((type *)0)->field)
61 -offsetof(type, field)]; \
64 #define typeof_field(type, field) typeof(((type *)0)->field)
65 #define type_check(t1,t2) ((t1*)0 - (t2*)0)
69 int:(x) ? -1 : 1; \
76 #define QEMU_BUILD_BUG_ON_ZERO(x) (sizeof(QEMU_BUILD_BUG_ON_STRUCT(x)) - \
88 #define __has_warning(x) 0 /* compatibility with non
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/openbmc/u-boot/arch/mips/include/asm/
H A Dbitops.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 1994 - 1997, 1999, 2000 Ralf Baechle (ralf@gnu.org)
17 #include <asm-generic/bitops/fls.h>
18 #include <asm-generic/bitops/__fls.h>
19 #include <asm-generic/bitops/fls64.h>
20 #include <asm-generic/bitops/__ffs.h>
55 * set_bit - Atomically set a bit in memory
62 * restricted to acting on a single-word quantity.
65 set_bit(int nr, volatile void *addr) in set_bit()
80 * __set_bit - Set a bit in memory
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/openbmc/u-boot/arch/x86/include/asm/
H A Dbitops.h10 * These have to be done with inline assembly: that way the bit-setting
17 #include <asm-generic/bitops/fls.h>
18 #include <asm-generic/bitops/__fls.h>
19 #include <asm-generic/bitops/fls64.h>
27 #define ADDR (*(volatile long *) addr)
30 * set_bit - Atomically set a bit in memory
37 * restricted to acting on a single-word quantity.
39 static __inline__ void set_bit(int nr, volatile void * addr) in set_bit()
48 * __set_bit - Set a bit in memory
52 * Unlike set_bit(), this function is non-atomic and may be reordered.
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/openbmc/qemu/include/qemu/
H A Dcompiler.h4 * See the COPYING file in the top-level directory.
45 const typeof(((type *) 0)->member) *__mptr = (ptr); \
46 (type *) ((char *) __mptr - offsetof(type, member));})
49 #define sizeof_field(type, field) sizeof(((type *)0)->field)
61 -offsetof(type, field)]; \
64 #define typeof_field(type, field) typeof(((type *)0)->field)
65 #define type_check(t1,t2) ((t1*)0 - (t2*)0)
69 int:(x) ? -1 : 1; \
76 #define QEMU_BUILD_BUG_ON_ZERO(x) (sizeof(QEMU_BUILD_BUG_ON_STRUCT(x)) - \
88 #define __has_warning(x) 0 /* compatibility with non-clang compilers */
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/openbmc/qemu/tests/tcg/aarch64_be/
H A Dhello.c2 * Non-libc syscall hello world for Aarch64 BE
4 * SPDX-License-Identifier: GPL-2.0-or-later
17 asm volatile("svc #0" : : "r"(x0), "r"(x1), "r"(x2), "r"(x8)); in write()
27 asm volatile("svc #0" : : "r"(x0), "r"(x8)); in exit()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dio.h23 #define readb(addr) in_8((volatile u8 *)(addr))
24 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
26 #define readw(addr) (*(volatile u16 *) (addr))
27 #define readl(addr) (*(volatile u32 *) (addr))
28 #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
29 #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
31 #define readw(addr) in_le16((volatile u16 *)(addr))
32 #define readl(addr) in_le32((volatile u32 *)(addr))
33 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
34 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
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/openbmc/u-boot/board/cobra5272/
H A Dflash.c1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2003
19 switch (info->flash_id & FLASH_VENDMASK) { in flash_print_info()
28 switch (info->flash_id & FLASH_TYPEMASK) { in flash_print_info()
39 info->size >> 20, info->sector_count); in flash_print_info()
42 for (i = 0; i < info->sector_count; i++) { in flash_print_info()
46 printf (" %08lX%s", info->start[i], in flash_print_info()
47 info->protect[i] ? " (RO)" : " "); in flash_print_info()
83 flashbase + 0x4000 + 0x2000 * (j - 1); in flash_init()
92 flashbase + 0x40000 + 0x40000 * (j - in flash_init()
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/openbmc/u-boot/arch/arm/include/asm/
H A Dglobal_data.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * (C) Copyright 2002-2010
10 /* Architecture-specific global data */
53 * or if RAM splits into non-consecutive banks. It also has a
64 * driver which continues to run after U-Boot exits.
83 #include <asm-generic/global_data.h>
97 * time of writing, clang: error: unknown argument: '-ffixed-x18' in get_gd()
99 __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr)); in get_gd()
101 __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr)); in get_gd()
110 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
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/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dserial_scc.c1 // SPDX-License-Identifier: GPL-2.0+
10 * Hacked for MPC8260 by Murray.Jensen@cmst.csiro.au, 19-Oct-00.
75 volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CONFIG_SYS_MPC85xx_CPM_ADDR; in mpc85xx_serial_init()
76 volatile ccsr_cpm_scc_t *sp; in mpc85xx_serial_init()
77 volatile scc_uart_t *up; in mpc85xx_serial_init()
78 volatile cbd_t *tbdf, *rbdf; in mpc85xx_serial_init()
79 volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp); in mpc85xx_serial_init()
84 sp = (ccsr_cpm_scc_t *) &(cpm->im_cpm_scc[SCC_INDEX]); in mpc85xx_serial_init()
85 up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]); in mpc85xx_serial_init()
89 sp->gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT); in mpc85xx_serial_init()
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H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0+
41 volatile ccsr_pcix_t *pcix = (void *)(CONFIG_SYS_MPC85xx_PCIX_ADDR); in pci_mpc85xx_init()
43 volatile ccsr_pcix_t *pcix2 = (void *)(CONFIG_SYS_MPC85xx_PCIX2_ADDR); in pci_mpc85xx_init()
45 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_mpc85xx_init()
52 hose->first_busno = 0; in pci_mpc85xx_init()
53 hose->last_busno = 0xff; in pci_mpc85xx_init()
62 dev = PCI_BDF(hose->first_busno, 0, 0); in pci_mpc85xx_init()
68 * Clear non-reserved bits in status register. in pci_mpc85xx_init()
72 if (!(gur->pordevsr & MPC85xx_PORDEVSR_PCI1)) { in pci_mpc85xx_init()
73 /* PCI-X init */ in pci_mpc85xx_init()
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/openbmc/u-boot/drivers/fastboot/
H A DKconfig72 the downloaded image to a non-volatile storage device. Define
92 default 0 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA = -1
93 default 1 if ARCH_SUNXI && MMC_SUNXI_SLOT_EXTRA != -1
96 regarding the non-volatile storage device. Define this to
103 When flashing NAND enable the DROP_FFS flag to drop trailing all-0xff
113 Table. (Additionally, this downloaded image is post-processed
/openbmc/ipmitool/lib/
H A Dipmi_channel.c1 /* -*-mode: C; indent-tabs-mode: t; -*-
22 * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
60 /* _ipmi_get_channel_access - Get Channel Access for given channel. Results are
63 * @intf - IPMI interface
64 * @channel_access - ptr to channel_access_t with Channel set.
65 * @get_volatile_settings - get volatile if != 0, else non-volatile settings.
67 * returns - negative number means error, positive is a ccode.
79 return (-3); in _ipmi_get_channel_access()
81 data[0] = channel_access->channel & 0x0F; in _ipmi_get_channel_access()
82 /* volatile - 0x80; non-volatile - 0x40 */ in _ipmi_get_channel_access()
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/openbmc/u-boot/doc/
H A DREADME.nvme1 # SPDX-License-Identifier: GPL-2.0+
10 communicate with a non-volatile memory subsystem. This interface is optimized
20 of some number of logical blocks. A namespace is a quantity of non-volatile
25 ------------
28 "nvme-blk"). The host controller driver is supposed to probe the hardware and
35 ------
39 --------------
43 Usage in U-Boot
44 ---------------
45 To use an NVMe hard disk from U-Boot shell, a 'nvme scan' command needs to
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/openbmc/u-boot/board/synopsys/emsdp/
H A Demsdp.c1 // SPDX-License-Identifier: GPL-2.0+
46 gd->cpu_clk = ((100 * fcnt) / rcnt) * 1000000; in mach_cpu_init()
62 host->name = "Synopsys Mobile storage"; in board_mmc_init()
63 host->ioaddr = SDIO_BASE; in board_mmc_init()
64 host->buswidth = 4; in board_mmc_init()
65 host->dev_index = 0; in board_mmc_init()
66 host->bus_hz = 50000000; in board_mmc_init()
68 add_dwmci(host, host->bus_hz / 2, 400000); in board_mmc_init()
75 struct dwmci_host *host = mmc->priv; in board_mmc_getcd()
122 argc--; in do_emsdp()
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/openbmc/u-boot/arch/powerpc/cpu/mpc86xx/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2006,2009-2010 Freescale Semiconductor, Inc.
37 volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; in checkcpu()
38 volatile ccsr_gur_t *gur = &immap->im_gur; in checkcpu()
54 cpu = gd->arch.cpu; in checkcpu()
56 puts(cpu->name); in checkcpu()
66 if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) in checkcpu()
68 debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); in checkcpu()
75 printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor)); in checkcpu()
76 printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus)); in checkcpu()
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/openbmc/qemu/hw/misc/
H A Dimx7_snvs.c2 * IMX7 Secure Non-Volatile Storage
9 * See the COPYING file in the top-level directory.
44 return s->tick_offset + ticks; in imx7_snvs_get_count()
60 ret = s->lpcr; in imx7_snvs_read()
73 s->lpcr = 0; in imx7_snvs_reset()
97 s->lpcr = v; in imx7_snvs_write()
109 s->tick_offset += new_value - snvs_count; in imx7_snvs_write()
136 memory_region_init_io(&s->mmio, obj, &imx7_snvs_ops, s, in imx7_snvs_init()
139 sysbus_init_mmio(sd, &s->mmio); in imx7_snvs_init()
142 s->tick_offset = mktimegm(&tm) - in imx7_snvs_init()
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/openbmc/qemu/docs/system/ppc/
H A Dprep.rst4 Use the executable ``qemu-system-ppc`` to simulate a complete 40P (PREP)
7 -----------------
13 * 2 IDE interfaces with hard disk and CD-ROM support
17 * PREP Non Volatile RAM
/openbmc/u-boot/arch/arm/include/asm/ti-common/
H A Dsys_proto.h1 /* SPDX-License-Identifier: GPL-2.0+ */
23 asm volatile ("mov %0, pc" : "=r" (pc)); in running_from_sdram()
31 * u-boot can be running from sdram either because of configuration in uboot_loaded_by_spl()
35 * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a in uboot_loaded_by_spl()
38 if (gd->arch.omap_ch_flags & CH_FLAGS_CHSETTINGS) in uboot_loaded_by_spl()
48 * 2. U-Boot running from FLASH
49 * 3. Non-XIP U-Boot loaded to SDRAM by SPL
50 * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the

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