| /openbmc/linux/arch/arm/common/ |
| H A D | mcpm_head.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/common/mcpm_head.S -- kernel entry point for multi-cluster PM
6 * Copyright: (C) 2012-2013 Linaro Limited
8 * Refer to Documentation/arch/arm/cluster-pm-race-avoidance.rst
18 .arch armv7-a
28 1903: .asciz " cluster"
56 ubfx r10, r0, #8, #8 @ r10 = cluster
88 mla r8, r0, r10, r8 @ r8 = sync cluster base
96 @ At this point, the cluster cannot unexpectedly enter the GOING_DOWN
100 mla r11, r0, r10, r11 @ r11 = cluster first man lock
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| H A D | mcpm_entry.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/common/mcpm_entry.c -- entry point for multi-cluster PM
6 * Copyright: (C) 2012-2013 Linaro Limited
24 * see Documentation/arch/arm/cluster-pm-race-avoidance.rst.
34 static void __mcpm_cpu_going_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_going_down() argument
36 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_GOING_DOWN; in __mcpm_cpu_going_down()
37 sync_cache_w(&mcpm_sync.clusters[cluster].cpus[cpu].cpu); in __mcpm_cpu_going_down()
42 * cluster can be torn down without disrupting this CPU.
47 static void __mcpm_cpu_down(unsigned int cpu, unsigned int cluster) in __mcpm_cpu_down() argument
50 mcpm_sync.clusters[cluster].cpus[cpu].cpu = CPU_DOWN; in __mcpm_cpu_down()
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| /openbmc/u-boot/arch/arm/cpu/armv8/ |
| H A D | Kconfig | 15 bool "Enable multiple CPUs to enter into U-Boot"
18 bool "Enable data coherency with other cores in cluster"
21 CPUECTLR_EL1.SMPEN bit before U-Boot.
24 cluster, and for A57/A72, it enables receiving of instruction
36 bool "Support spin-table enable method"
39 Say Y here to support "spin-table" enable method for booting Linux.
42 - Specify enable-method = "spin-table" in each CPU node in the
44 - Bring secondary CPUs into U-Boot proper in a board specific
49 U-Boot automatically does:
50 - Set "cpu-release-addr" property of each CPU node
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| /openbmc/linux/Documentation/devicetree/bindings/cpu/ |
| H A D | cpu-topology.txt | 6 1 - Introduction
12 - socket
13 - cluster
14 - core
15 - thread
18 symmetric multi-threading (SMT) is supported or not.
29 Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
39 2 - cpu-map node
42 The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
46 - cpu-map node
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| /openbmc/linux/arch/arm/mach-sunxi/ |
| H A D | mc_smp.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018 Chen-Yu Tsai
5 * Chen-Yu Tsai <wens@csie.org>
7 * arch/arm/mach-sunxi/mc_smp.c
9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and
10 * arch/arm/mach-hisi/platmcpm.c
11 * Cluster cache enable trampoline code adapted from MCPM framework
14 #include <linux/arm-cci.h>
19 #include <linux/irqchip/arm-gic.h>
70 /* R_CPUCFG registers, specific to sun8i-a83t */
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| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/etcd/etcd/ |
| H A D | etcd-new.service | 2 Description=etcd cluster member start/add service
3 Documentation=https://etcd.io/docs/v3.5/op-guide/clustering/
5 ConditionPathExists=/run/etcd-new.conf
10 EnvironmentFile=/run/etcd-new.conf
15 WantedBy=multi-user.target
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| /openbmc/linux/Documentation/arch/arm/ |
| H A D | cluster-pm-race-avoidance.rst | 2 Cluster-wide Power-up/power-down race avoidance algorithm
6 cluster setup and teardown operations and to manage hardware coherency
16 ---------
29 cluster-level operations are only performed when it is truly safe to do
34 are not immediately enabled when a cluster powers up. Since enabling or
35 disabling those mechanisms may itself be a non-atomic operation (such as
38 power-down and power-up at the cluster level.
46 -----------
48 Each cluster and CPU is assigned a state, as follows:
50 - DOWN
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 037 | 66 for ((i=0;i<=$((sectors - 1));i++)); do
70 echo "$op -P $pattern $((cur_sec * 512)) 512"
78 _make_test_img -b "$TEST_IMG.base" -F $IMGFMT 6G
81 echo "== COW in a single cluster =="
82 $QEMU_IO -c "write -P 0x77 0 2k" "$TEST_IMG" | _filter_qemu_io
83 $QEMU_IO -c "write -P 0x88 6k 2k" "$TEST_IMG" | _filter_qemu_io
84 $QEMU_IO -c "write -P 0x99 9k 2k" "$TEST_IMG" | _filter_qemu_io
86 $QEMU_IO -c "read -P 0x77 0 2k" "$TEST_IMG" | _filter_qemu_io
88 $QEMU_IO -c "read -P 0x88 6k 2k" "$TEST_IMG" | _filter_qemu_io
90 $QEMU_IO -c "read -P 0x99 9k 2k" "$TEST_IMG" | _filter_qemu_io
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| /openbmc/linux/arch/arm/mach-versatile/ |
| H A D | spc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
28 #define SPCLOG "vexpress-spc: "
39 /* SPC wake-up IRQs status and mask */
46 /* SPC per-CPU mailboxes */
50 /* SPC CPU/cluster reset statue */
68 /* wake-up interrupt masks */
71 /* TC2 static dual-cluster configuration */
75 * Even though the SPC takes max 3-5 ms to complete any OPP/COMMS
97 * A15s cluster identifier
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| H A D | platsmp-vexpress.c | 1 // SPDX-License-Identifier: GPL-2.0-only
27 * The best way to detect a multi-cluster configuration in vexpress_smp_init_ops()
40 cci_node = of_parse_phandle(cpu_node, "cci-control-port", 0); in vexpress_smp_init_ops()
57 { .compatible = "arm,cortex-a5-scu", },
58 { .compatible = "arm,cortex-a9-scu", },
72 * system-wide flags register. The boot monitor waits in vexpress_smp_dt_prepare_cpus()
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| /openbmc/qemu/docs/system/ |
| H A D | gdb.rst | 4 ---------
6 QEMU supports working with gdb via gdb's remote-connection facility
8 way that you might with a low-level debug facility like JTAG
13 In order to use gdb, launch QEMU with the ``-s`` and ``-S`` options.
14 The ``-s`` option will make QEMU listen for an incoming connection
15 from gdb on TCP port 1234, and ``-S`` will make QEMU not start the
18 connection, use the ``-gdb dev`` option instead of ``-s``. See
21 .. parsed-literal::
23 |qemu_system| -s -S -kernel bzImage -hda rootdisk.img -append "root=/dev/hda"
59 As TCG cannot track all memory accesses in user-mode there is no
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| /openbmc/linux/Documentation/admin-guide/perf/ |
| H A D | hisi-pmu.rst | 10 The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster
12 called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has
13 two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
16 -------------------------------
28 name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>.
29 where "sccl-id" is the identifier of the SCCL and "index-id" is the index of
45 ------------------------------------------
47 ------------------------------------------
49 ------------------------------------------
51 ------------------------------------------
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| /openbmc/linux/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_vop2_reg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Andy Yan <andy.yan@rock-chips.com>
126 * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win.
127 * Every cluster can work as 4K win or split into two win.
128 * All win in cluster support AFBCD.
130 * Every esmart win and smart win support 4 Multi-region.
134 * * Cluster: bicubic for horizontal scale up, others use bilinear
136 * * nearest-neighbor/bilinear/bicubic for scale up
137 * * nearest-neighbor/bilinear/average for scale down
140 * @TODO describe the wind like cpu-map dt nodes;
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| /openbmc/u-boot/arch/arm/include/asm/ |
| H A D | macro.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * include/asm-arm/macro.h
5 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
24 * caches are enabled or on a multi-core system.
81 * Branch if current processor is a Cortex-A57 core.
87 cmp \xreg, #0xD07 /* Cortex-A57 MPCore processor. */
92 * Branch if current processor is a Cortex-A53 core.
98 cmp \xreg, #0xD03 /* Cortex-A53 MPCore processor. */
108 /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
130 /* NOTE: MPIDR handling will be erroneous on multi-cluster machines */
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| /openbmc/linux/drivers/perf/ |
| H A D | qcom_l2_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved.
26 #include <soc/qcom/kryo-l2-accessors.h>
121 * The cache is made up of one or more clusters, each cluster has its own PMU.
122 * Each cluster is associated with one or more CPUs.
125 * Events can be envisioned as a 2-dimensional array. Each column represents
143 /* The CPU that is used for collecting events on this cluster */
145 /* All the CPUs associated with this cluster */
166 return *per_cpu_ptr(l2cache_pmu->pmu_cluster, cpu); in get_cluster_pmu()
243 static void cluster_pmu_set_resr(struct cluster_pmu *cluster, in cluster_pmu_set_resr() argument
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| /openbmc/linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,cci-400.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,cci-400.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
13 ARM multi-cluster systems maintain intra-cluster coherency through a cache
24 pattern: "^cci(@[0-9a-f]+)?$"
28 - arm,cci-400
29 - arm,cci-500
30 - arm,cci-550
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| /openbmc/linux/arch/mips/kernel/ |
| H A D | smp-cps.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include <asm/mips-cps.h>
21 #include <asm/pm-cps.h>
24 #include <asm/smp-cps.h>
32 static unsigned __init core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument
34 return min(smp_max_threads, mips_cps_numvps(cluster, core)); in core_vpe_count()
60 /* Use the number of VPEs in cluster 0 core 0 for smp_num_siblings */ in cps_smp_setup()
64 for (v = 0; v < min_t(int, core_vpes, NR_CPUS - nvpes); v++) { in cps_smp_setup()
103 /* If we have an FPU, enroll ourselves in the FPU-full mask */ in cps_smp_setup()
117 /* Detect whether the CCA is unsuited to multi-core SMP */ in cps_prepare_cpus()
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| /openbmc/linux/Documentation/devicetree/bindings/soc/qcom/ |
| H A D | qcom,spm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
20 - enum:
21 - qcom,sdm660-gold-saw2-v4.1-l2
22 - qcom,sdm660-silver-saw2-v4.1-l2
23 - qcom,msm8998-gold-saw2-v4.1-l2
24 - qcom,msm8998-silver-saw2-v4.1-l2
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| /openbmc/linux/fs/exfat/ |
| H A D | exfat_fs.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
51 (ES_IDX_FIRST_FILENAME + EXFAT_FILENAME_ENTRY_NUM(name_len) - 1)
77 #define MAX_CHARSET_SIZE 6 /* max size of multi-byte character */
81 #define EXFAT_HINT_NONE -1
85 * helpers for cluster size to byte conversion.
87 #define EXFAT_CLU_TO_B(b, sbi) ((b) << (sbi)->cluster_size_bits)
88 #define EXFAT_B_TO_CLU(b, sbi) ((b) >> (sbi)->cluster_size_bits)
90 (((b - 1) >> (sbi)->cluster_size_bits) + 1)
91 #define EXFAT_CLU_OFFSET(off, sbi) ((off) & ((sbi)->cluster_size - 1))
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| /openbmc/linux/fs/erofs/ |
| H A D | erofs_fs.h | 1 /* SPDX-License-Identifier: GPL-2.0-only OR Apache-2.0 */
3 * EROFS (Enhanced ROM File System) on-disk format definition
5 * Copyright (C) 2017-2018 HUAWEI, Inc.
54 /* erofs on-disk super block (currently 128 bytes) */
63 __le64 inos; /* total valid ino # (== f_files - f_favail) */
70 __u8 uuid[16]; /* 128-bit uuid for volume */
90 * EROFS inode datalayout (i_format in on-disk inode):
91 * 0 - uncompressed flat inode without tail-packing inline data:
92 * 1 - compressed inode with non-compact indexes:
93 * 2 - uncompressed flat inode with tail-packing inline data:
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| /openbmc/linux/drivers/bus/ |
| H A D | arm-cci.c | 17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
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| /openbmc/linux/Documentation/filesystems/ |
| H A D | f2fs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 WHAT IS Flash-Friendly File System (F2FS)?
7 NAND flash memory-based storage devices, such as SSD, eMMC, and SD cards, have
13 F2FS is a file system exploiting NAND flash memory-based storage devices, which
14 is based on Log-structured File System (LFS). The design has been focused on
18 Since a NAND flash memory-based storage device shows different characteristic
20 F2FS and its tools support various parameters not only for configuring on-disk
26 - git://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git
30 - linux-f2fs-devel@lists.sourceforge.net
34 - https://bugzilla.kernel.org/enter_bug.cgi?product=File%20System&component=f2fs
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| /openbmc/linux/drivers/media/v4l2-core/ |
| H A D | v4l2-ctrls-api.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2010-2021 Hans Verkuil <hverkuil-cisco@xs4all.nl>
8 #define pr_fmt(fmt) "v4l2-ctrls: " fmt
13 #include <media/v4l2-ctrls.h>
14 #include <media/v4l2-dev.h>
15 #include <media/v4l2-device.h>
16 #include <media/v4l2-event.h>
17 #include <media/v4l2-ioctl.h>
19 #include "v4l2-ctrls-priv.h"
29 * same cluster, or 0 if there isn't any.
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | cpu_init.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2007-2011 Freescale Semiconductor, Inc.
69 clrbits_be32(&usb_phy->pllprg[1], in usb_single_source_clk_configure()
71 setbits_be32(&usb_phy->pllprg[1], in usb_single_source_clk_configure()
83 u32 xcvrprg = in_be32(&usb_phy->port1.xcvrprg); in fsl_erratum_a006261_workaround()
90 out_be32(&usb_phy->port1.xcvrprg, xcvrprg); in fsl_erratum_a006261_workaround()
92 xcvrprg = in_be32(&usb_phy->port2.xcvrprg); in fsl_erratum_a006261_workaround()
98 out_be32(&usb_phy->port2.xcvrprg, xcvrprg); in fsl_erratum_a006261_workaround()
102 u32 status = in_be32(&usb_phy->status1); in fsl_erratum_a006261_workaround()
112 setbits_be32(&usb_phy->config1, in fsl_erratum_a006261_workaround()
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| /openbmc/linux/drivers/acpi/ |
| H A D | pptt.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * pptt.c - parsing of Processor Properties Topology Table (PPTT)
33 if (pptt_ref + sizeof(struct acpi_subtable_header) > table_hdr->length) in fetch_pptt_subtable()
38 if (entry->length == 0) in fetch_pptt_subtable()
41 if (pptt_ref + entry->length > table_hdr->length) in fetch_pptt_subtable()
65 if (resource >= node->number_of_priv_resources) in acpi_get_pptt_resource()
81 * acpi_pptt_walk_cache() - Attempt to find the requested acpi_pptt_cache
111 if (res->type != ACPI_PPTT_TYPE_CACHE) in acpi_pptt_walk_cache()
118 if (!(cache->flags & ACPI_PPTT_CACHE_TYPE_VALID)) { in acpi_pptt_walk_cache()
119 cache = fetch_pptt_cache(table_hdr, cache->next_level_of_cache); in acpi_pptt_walk_cache()
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