/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt6582.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 13 interrupt-parent = <&sysirq>; 16 #address-cells = <1>; 17 #size-cells = <0>; 21 compatible = "arm,cortex-a7"; 26 compatible = "arm,cortex-a7"; [all …]
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H A D | mt8127.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 15 interrupt-parent = <&sysirq>; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 enable-method = "mediatek,mt81xx-tz-smp"; 24 compatible = "arm,cortex-a7"; [all …]
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H A D | mt6589.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&sysirq>; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 enable-method = "mediatek,mt6589-smp"; 24 compatible = "arm,cortex-a7"; [all …]
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H A D | mt6592.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&sysirq>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 28 compatible = "arm,cortex-a7"; [all …]
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H A D | mt6580.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 15 interrupt-parent = <&sysirq>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 28 compatible = "arm,cortex-a7"; [all …]
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H A D | mt8135.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8135-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/mt8135-resets.h> 12 #include <dt-bindings/pinctrl/mt8135-pinfunc.h> 15 #address-cells = <2>; 16 #size-cells = <2>; 18 interrupt-parent = <&sysirq>; 20 cpu-map { [all …]
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H A D | mt2701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt2701-clk.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/mt2701-power.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/memory/mt2701-larb-port.h> 14 #include <dt-bindings/reset/mt2701-resets.h> 15 #include "mt2701-pinfunc.h" 18 #address-cells = <2>; [all …]
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H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/phy/phy.h> 17 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt6797.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include <dt-bindings/clock/mt6797-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/pinctrl/mt6797-pinfunc.h> 14 interrupt-parent = <&sysirq>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <1>; [all …]
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H A D | mt6755.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&sysirq>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "arm,psci-0.2"; 22 #address-cells = <1>; 23 #size-cells = <0>; 27 compatible = "arm,cortex-a53"; [all …]
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H A D | mt6779.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <dt-bindings/clock/mt6779-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/mt6779-pinfunc.h> 15 interrupt-parent = <&sysirq>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 compatible = "arm,psci-0.2"; 25 #address-cells = <1>; [all …]
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H A D | mt8516.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/mt8516-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/phy/phy.h> 13 #include "mt8516-pinfunc.h" 17 interrupt-parent = <&sysirq>; 18 #address-cells = <2>; 19 #size-cells = <2>; 21 cluster0_opp: opp-table-0 { [all …]
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H A D | mt6795.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mediatek,mt6795-clk.h> 10 #include <dt-bindings/gce/mediatek,mt6795-gce.h> 11 #include <dt-bindings/memory/mt6795-larb-port.h> 12 #include <dt-bindings/pinctrl/mt6795-pinfunc.h> 13 #include <dt-bindings/power/mt6795-power.h> 14 #include <dt-bindings/reset/mediatek,mt6795-resets.h> 18 interrupt-parent = <&sysirq>; [all …]
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H A D | mt2712e.dtsi | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mt2712-clk.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/memory/mt2712-larb-port.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt2712-power.h> 14 #include "mt2712-pinfunc.h" 18 interrupt-parent = <&sysirq>; 19 #address-cells = <2>; [all …]
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H A D | mt8365.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/clock/mediatek,mt8365-clk.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/phy/phy.h> 15 interrupt-parent = <&sysirq>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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H A D | mt7986a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/mt7986-clk.h> 10 #include <dt-bindings/reset/mt7986-resets.h> 11 #include <dt-bindings/phy/phy.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; [all …]
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H A D | mt8173.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/mt8173-clk.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/memory/mt8173-larb-port.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/power/mt8173-power.h> 13 #include <dt-bindings/reset/mt8173-resets.h> 14 #include <dt-bindings/gce/mt8173-gce.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
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/openbmc/linux/Documentation/devicetree/bindings/serial/ |
H A D | mediatek,uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/mediatek,uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek Universal Asynchronous Receiver/Transmitter (UART) 10 - Matthias Brugger <matthias.bgg@gmail.com> 13 - $ref: serial.yaml# 16 The MediaTek UART is based on the basic 8250 UART and compatible 23 - const: mediatek,mt6577-uart 24 - items: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | mediatek,uart-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/mediatek,uart-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: MediaTek UART APDMA controller 10 - Long Cheng <long.cheng@mediatek.com> 13 The MediaTek UART APDMA controller provides DMA capabilities 14 for the UART peripheral bus. 17 - $ref: dma-controller.yaml# 22 - items: [all …]
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/openbmc/linux/drivers/tty/serial/8250/ |
H A D | 8250_mtk.c | 1 // SPDX-License-Identifier: GPL-2.0+ 19 #include <linux/dma-mapping.h> 28 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */ 94 struct uart_8250_dma *dma = up->dma; in mtk8250_dma_rx_complete() 95 struct mtk8250_data *data = up->port.private_data; in mtk8250_dma_rx_complete() 96 struct tty_port *tty_port = &up->port.state->port; in mtk8250_dma_rx_complete() 102 if (data->rx_status == DMA_RX_SHUTDOWN) in mtk8250_dma_rx_complete() 105 spin_lock_irqsave(&up->port.lock, flags); in mtk8250_dma_rx_complete() 107 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); in mtk8250_dma_rx_complete() 108 total = dma->rx_size - state.residue; in mtk8250_dma_rx_complete() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/net/ |
H A D | mediatek-bluetooth.txt | 1 MediaTek SoC built-in Bluetooth Devices 5 child node of the serial node with BTIF. The dt-bindings details for BTIF 10 - compatible: Must be 11 "mediatek,mt7622-bluetooth": for MT7622 SoC 12 - clocks: Should be the clock specifiers corresponding to the entry in 13 clock-names property. 14 - clock-names: Should contain "ref" entries. 15 - power-domains: Phandle to the power domain that the device is part of 20 compatible = "mediatek,mt7622-btif", 21 "mediatek,mtk-btif"; [all …]
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/openbmc/u-boot/drivers/serial/ |
H A D | serial_mtk.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * MediaTek High-speed UART driver 52 #define BAUD_ALLOW_MIX(baud) ((baud) - (baud) * 3 / 100) 64 if ((baud <= 115200) && (priv->clock == 12000000)) in _mtk_serial_setbrg() 70 writel(0, &priv->regs->highspeed); in _mtk_serial_setbrg() 71 quot = DIV_ROUND_CLOSEST(priv->clock, 16 * baud); in _mtk_serial_setbrg() 74 writel(3, &priv->regs->highspeed); in _mtk_serial_setbrg() 75 quot = DIV_ROUND_CLOSEST(priv->clock, 256 * baud); in _mtk_serial_setbrg() 79 samplecount = DIV_ROUND_CLOSEST(priv->clock, in _mtk_serial_setbrg() 82 realbaud = priv->clock / samplecount / quot; in _mtk_serial_setbrg() [all …]
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/openbmc/linux/drivers/dma/mediatek/ |
H A D | mtk-uart-apdma.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * MediaTek UART APDMA driver. 11 #include <linux/dma-mapping.h> 25 #include "../virt-dma.h" 123 writel(val, c->base + reg); in mtk_uart_apdma_write() 128 return readl(c->base + reg); in mtk_uart_apdma_read() 139 to_mtk_uart_apdma_dev(c->vc.chan.device); in mtk_uart_apdma_start_tx() 140 struct mtk_uart_apdma_desc *d = c->desc; in mtk_uart_apdma_start_tx() 143 vff_sz = c->cfg.dst_port_window_size; in mtk_uart_apdma_start_tx() 145 mtk_uart_apdma_write(c, VFF_ADDR, d->addr); in mtk_uart_apdma_start_tx() [all …]
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