181973159SSean WangMediaTek SoC built-in Bluetooth Devices
281973159SSean Wang==================================
381973159SSean Wang
481973159SSean WangThis device is a serial attached device to BTIF device and thus it must be a
581973159SSean Wangchild node of the serial node with BTIF. The dt-bindings details for BTIF
6d985becfSMauro Carvalho Chehabdevice can be known via Documentation/devicetree/bindings/serial/8250.yaml.
781973159SSean Wang
881973159SSean WangRequired properties:
981973159SSean Wang
1081973159SSean Wang- compatible:	Must be
1181973159SSean Wang		  "mediatek,mt7622-bluetooth": for MT7622 SoC
1281973159SSean Wang- clocks:	Should be the clock specifiers corresponding to the entry in
1381973159SSean Wang		clock-names property.
1481973159SSean Wang- clock-names:	Should contain "ref" entries.
1581973159SSean Wang- power-domains: Phandle to the power domain that the device is part of
1681973159SSean Wang
1781973159SSean WangExample:
1881973159SSean Wang
1981973159SSean Wang	btif: serial@1100c000 {
2081973159SSean Wang		compatible = "mediatek,mt7622-btif",
2181973159SSean Wang			     "mediatek,mtk-btif";
2281973159SSean Wang		reg = <0 0x1100c000 0 0x1000>;
2381973159SSean Wang		interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_LOW>;
2481973159SSean Wang		clocks = <&pericfg CLK_PERI_BTIF_PD>;
2581973159SSean Wang		clock-names = "main";
2681973159SSean Wang		reg-shift = <2>;
2781973159SSean Wang		reg-io-width = <4>;
2881973159SSean Wang
2981973159SSean Wang		bluetooth {
3081973159SSean Wang			compatible = "mediatek,mt7622-bluetooth";
3181973159SSean Wang			power-domains = <&scpsys MT7622_POWER_DOMAIN_WB>;
3281973159SSean Wang			clocks = <&clk25m>;
3381973159SSean Wang			clock-names = "ref";
3481973159SSean Wang		};
3581973159SSean Wang	};
36b805c403SSean Wang
37b805c403SSean WangMediaTek UART based Bluetooth Devices
38b805c403SSean Wang==================================
39b805c403SSean Wang
40b805c403SSean WangThis device is a serial attached device to UART device and thus it must be a
41b805c403SSean Wangchild node of the serial node with UART.
42b805c403SSean Wang
43b805c403SSean WangPlease refer to the following documents for generic properties:
44b805c403SSean Wang
4532ced09dSGeert Uytterhoeven	Documentation/devicetree/bindings/serial/serial.yaml
46b805c403SSean Wang
47b805c403SSean WangRequired properties:
48b805c403SSean Wang
49b805c403SSean Wang- compatible:	Must be
50b805c403SSean Wang		  "mediatek,mt7663u-bluetooth": for MT7663U device
51b805c403SSean Wang		  "mediatek,mt7668u-bluetooth": for MT7668U device
52b805c403SSean Wang- vcc-supply:	Main voltage regulator
531c576f38SSean Wang
541c576f38SSean WangIf the pin controller on the platform can support both pinmux and GPIO
551c576f38SSean Wangcontrol such as the most of MediaTek platform. Please use below properties.
561c576f38SSean Wang
57b805c403SSean Wang- pinctrl-names: Should be "default", "runtime"
58b805c403SSean Wang- pinctrl-0: Should contain UART RXD low when the device is powered up to
59b805c403SSean Wang	     enter proper bootstrap mode.
60b805c403SSean Wang- pinctrl-1: Should contain UART mode pin ctrl
61b805c403SSean Wang
621c576f38SSean WangElse, the pin controller on the platform only can support pinmux control and
631c576f38SSean Wangthe GPIO control still has to rely on the dedicated GPIO controller such as
641c576f38SSean Wanga legacy MediaTek SoC, MT7621. Please use the below properties.
651c576f38SSean Wang
661c576f38SSean Wang- boot-gpios:	GPIO same to the pin as UART RXD and used to keep LOW when
671c576f38SSean Wang		the device is powered up to enter proper bootstrap mode when
681c576f38SSean Wang- pinctrl-names: Should be "default"
691c576f38SSean Wang- pinctrl-0: Should contain UART mode pin ctrl
701c576f38SSean Wang
71b805c403SSean WangOptional properties:
72b805c403SSean Wang
73b805c403SSean Wang- reset-gpios:	GPIO used to reset the device whose initial state keeps low,
74b805c403SSean Wang		if the GPIO is missing, then board-level design should be
75b805c403SSean Wang		guaranteed.
7614e3ed84SSean Wang- clocks:	Should be the clock specifiers corresponding to the entry in
7714e3ed84SSean Wang		clock-names property. If the clock is missing, then board-level
7814e3ed84SSean Wang		design should be guaranteed.
7914e3ed84SSean Wang- clock-names:	Should contain "osc" entry for the external oscillator.
80b805c403SSean Wang- current-speed:  Current baud rate of the device whose defaults to 921600
81b805c403SSean Wang
82b805c403SSean WangExample:
83b805c403SSean Wang
84b805c403SSean Wang	uart1_pins_boot: uart1-default {
85b805c403SSean Wang		pins-dat {
86b805c403SSean Wang			pinmux = <MT7623_PIN_81_URXD1_FUNC_GPIO81>;
87b805c403SSean Wang			output-low;
88b805c403SSean Wang		};
89b805c403SSean Wang	};
90b805c403SSean Wang
91b805c403SSean Wang	uart1_pins_runtime: uart1-runtime {
92b805c403SSean Wang		pins-dat {
93b805c403SSean Wang			pinmux = <MT7623_PIN_81_URXD1_FUNC_URXD1>,
94b805c403SSean Wang				 <MT7623_PIN_82_UTXD1_FUNC_UTXD1>;
95b805c403SSean Wang		};
96b805c403SSean Wang	};
97b805c403SSean Wang
98b805c403SSean Wang	uart1: serial@11003000 {
99b805c403SSean Wang		compatible = "mediatek,mt7623-uart",
100b805c403SSean Wang			     "mediatek,mt6577-uart";
101b805c403SSean Wang		reg = <0 0x11003000 0 0x400>;
102b805c403SSean Wang		interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_LOW>;
103b805c403SSean Wang		clocks = <&pericfg CLK_PERI_UART1_SEL>,
104b805c403SSean Wang			 <&pericfg CLK_PERI_UART1>;
105b805c403SSean Wang		clock-names = "baud", "bus";
106b805c403SSean Wang
107b805c403SSean Wang		bluetooth {
108b805c403SSean Wang			compatible = "mediatek,mt7663u-bluetooth";
109b805c403SSean Wang			vcc-supply = <&reg_5v>;
110b805c403SSean Wang			reset-gpios = <&pio 24 GPIO_ACTIVE_LOW>;
111b805c403SSean Wang			pinctrl-names = "default", "runtime";
112b805c403SSean Wang			pinctrl-0 = <&uart1_pins_boot>;
113b805c403SSean Wang			pinctrl-1 = <&uart1_pins_runtime>;
114b805c403SSean Wang			current-speed = <921600>;
115b805c403SSean Wang		};
116b805c403SSean Wang	};
117