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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dbaikal,bt1-pcie.yaml75 - const: mstr
88 - const: mstr
155 clock-names = "dbi", "mstr", "slv", "ref";
160 reset-names = "mstr", "slv", "pwr", "hot", "phy", "core", "pipe",
H A Dsnps,dw-pcie-common.yaml84 const: mstr
119 - description: See native 'mstr/slv' clock for details
150 const: mstr
/openbmc/u-boot/board/compulab/cl-som-imx7/
H A Dspl.c90 cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01041001; in cl_som_imx7_spl_dram_cfg_size()
101 cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; in cl_som_imx7_spl_dram_cfg_size()
112 cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; in cl_som_imx7_spl_dram_cfg_size()
123 cl_som_imx7_spl_ddrc_regs_val.mstr = 0x01040001; in cl_som_imx7_spl_dram_cfg_size()
/openbmc/linux/arch/s390/kernel/
H A Dearly.c136 char mstr[80], hvstr[17]; in setup_arch_string() local
144 sprintf(mstr, "%-16.16s %-4.4s %-16.16s %-16.16s", in setup_arch_string()
147 strim_all(mstr); in setup_arch_string()
158 dump_stack_set_arch_desc("%s (%s)", mstr, hvstr); in setup_arch_string()
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dddr.c44 writel(ddrc_regs_val->mstr, &ddrc_regs->mstr); in mx7_dram_cfg()
118 reg_val = readl(&ddrc_regs->mstr); in imx_ddr_size()
/openbmc/u-boot/doc/device-tree-bindings/memory-controllers/
H A Dst,stm32mp1-ddr.txt28 MSTR
180 0x00040401 /*MSTR*/
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a23.c211 writel(0x01040001, &mctl_ctl->mstr); in mctl_init()
213 writel(0x01040401, &mctl_ctl->mstr); in mctl_init()
249 setbits_le32(&mctl_ctl->mstr, 0x1000); in mctl_init()
/openbmc/linux/drivers/video/fbdev/core/
H A Dfbsysfs.c60 char mstr[100]; in store_mode() local
71 i = mode_string(mstr, 0, mode); in store_mode()
72 if (strncmp(mstr, buf, max(count, i)) == 0) { in store_mode()
/openbmc/u-boot/board/technexion/pico-imx7d/
H A Dspl.c25 .mstr = 0x01040001,
/openbmc/u-boot/drivers/i2c/
H A Dxilinx_xiic.c52 #define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */
55 #define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */
/openbmc/u-boot/drivers/ram/stm32mp1/
H A Dstm32mp1_ddr.h41 u32 mstr; member
H A Dstm32mp1_ddr.c46 DDRCTL_REG_REG(mstr),
451 if (config->c_reg.mstr & DDRCTRL_MSTR_DDR3) in stm32mp1_ddr_init()
H A Dstm32mp1_ddr_regs.h11 u32 mstr ; /* 0x0 Master*/ member
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dmx7-ddr.h15 u32 mstr; /* 0x0000 */ member
/openbmc/linux/drivers/spi/
H A Dspi-atmel.c408 | SPI_BIT(MSTR)); in cs_activate()
413 | SPI_BIT(MSTR)); in cs_activate()
558 * This driver configures the spi controller for host mode (MSTR bit in atmel_spi_dma_slave_config()
1509 | SPI_BIT(MSTR)); in atmel_spi_init()
1511 spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS)); in atmel_spi_init()
H A Dspi-mpc512x-psc.c411 0x00004000 | /* MSTR = 1 -- SPI master */ in mpc512x_psc_spi_port_config()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun8i_a23.h92 u32 mstr; /* 0x00 */ member
H A Ddram_sun50i_h6.h66 u32 mstr; /* 0x000 */ member
H A Ddram_sun9i.h41 u32 mstr; /* 0x00 master register */ member
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpcie-designware.c28 [DW_PCIE_MSTR_CLK] = "mstr",
41 [DW_PCIE_MSTR_RST] = "mstr",
/openbmc/linux/drivers/accel/habanalabs/gaudi2/
H A Dgaudi2_security.c2883 /* PCIE MSTR */ in gaudi2_write_rr_to_all_lbw_rtrs()
3102 /* PCIE MSTR */ in gaudi2_write_hbw_rr_to_all_mstr_if()
3366 /* Sync Manager MSTR IF */ in gaudi2_init_protection_bits()
3710 /* Sync Manager MSTR IF */ in gaudi2_ack_protection_bits_errors()
/openbmc/linux/drivers/staging/vc04_services/interface/vchiq_arm/
H A Dvchiq_core.h164 int remote_notify; /* Bulk to notify the remote client of next (mstr) */
/openbmc/linux/drivers/i2c/busses/
H A Di2c-xiic.c169 #define XIIC_SR_GEN_CALL_MASK 0x01 /* 1=a mstr issued a GC */
172 #define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x08 /* 1=Dir: mstr <-- slave */
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h69 u32 mstr; member
/openbmc/linux/sound/soc/codecs/
H A Dwm8962.h1355 #define WM8962_MSTR 0x0040 /* MSTR */
1356 #define WM8962_MSTR_MASK 0x0040 /* MSTR */
1357 #define WM8962_MSTR_SHIFT 6 /* MSTR */
1358 #define WM8962_MSTR_WIDTH 1 /* MSTR */

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