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/openbmc/linux/drivers/spi/
H A Dspi-mpc512x-psc.c35 #define psc_addr(mps, regname) ({ \ argument
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
88 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master); in mpc512x_psc_spi_activate_cs() local
94 sicr = in_be32(psc_addr(mps, sicr)); in mpc512x_psc_spi_activate_cs()
111 out_be32(psc_addr(mps, sicr), sicr); in mpc512x_psc_spi_activate_cs()
113 ccr = in_be32(psc_addr(mps, ccr)); in mpc512x_psc_spi_activate_cs()
118 bclkdiv = (mps->mclk_rate / speed) - 1; in mpc512x_psc_spi_activate_cs()
121 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_activate_cs()
[all …]
H A Dspi-mpc52xx-psc.c63 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master); in mpc52xx_psc_spi_activate_cs() local
64 struct mpc52xx_psc __iomem *psc = mps->psc; in mpc52xx_psc_spi_activate_cs()
97 mps->bits_per_word = cs->bits_per_word; in mpc52xx_psc_spi_activate_cs()
107 struct mpc52xx_psc_spi *mps = spi_master_get_devdata(spi->master); in mpc52xx_psc_spi_transfer_rxtx() local
108 struct mpc52xx_psc __iomem *psc = mps->psc; in mpc52xx_psc_spi_transfer_rxtx()
109 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo; in mpc52xx_psc_spi_transfer_rxtx()
159 wait_for_completion(&mps->done); in mpc52xx_psc_spi_transfer_rxtx()
242 static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps) in mpc52xx_psc_spi_port_config() argument
244 struct mpc52xx_psc __iomem *psc = mps->psc; in mpc52xx_psc_spi_port_config()
245 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo; in mpc52xx_psc_spi_port_config()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dmps,mpq7920.yaml4 $id: http://devicetree.org/schemas/regulator/mps,mpq7920.yaml#
17 - mps,mpq7920
30 mps,switch-freq:
54 mps,buck-softstart:
61 mps,buck-phase-delay:
68 mps,buck-ovp-disable:
91 compatible = "mps,mpq7920";
95 mps,switch-freq = /bits/ 8 <1>;
104 mps,buck-ovp-disable;
105 mps,buck-phase-delay = /bits/ 8 <2>;
[all …]
H A Dmps,mp886x.yaml4 $id: http://devicetree.org/schemas/regulator/mps,mp886x.yaml#
18 - mps,mp8867
19 - mps,mp8869
28 mps,fb-voltage-divider:
34 mps,switch-frequency-hz:
42 - mps,fb-voltage-divider
53 compatible = "mps,mp8869";
58 mps,fb-voltage-divider = <80 240>;
H A Dmps,mp5416.yaml4 $id: http://devicetree.org/schemas/regulator/mps,mp5416.yaml#
17 - mps,mp5416
18 - mps,mp5496
56 compatible = "mps,mp5416";
H A Dmps,mpq7932.yaml4 $id: http://devicetree.org/schemas/regulator/mps,mpq7932.yaml#
15 - mps,mpq7932
48 compatible = "mps,mpq7932";
H A Dmp8859.txt4 - compatible: "mps,mp8859";
13 compatible = "mps,mp8859";
/openbmc/linux/drivers/pci/
H A DKconfig214 MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
218 The following choices set the MPS and MRRS optimization strategy
231 Use the BIOS defaults; don't touch MPS at all. This is the same
238 Default choice; ensure that the MPS matches upstream bridge.
244 Use largest MPS that boot-time devices support. If you have a
246 will use the largest MPS that's supported by all devices. This
253 Use MPS and MRRS for best performance. Ensure that a given
254 device's MPS is no larger than its parent MPS, which allows us to
255 keep all switches/bridges to the max MPS supported by their
262 Set MPS = 128 for all devices. MPS configuration effected by the
[all …]
H A Dprobe.c2023 int mps, mpss, p_mps, rc; in pci_configure_mps() local
2028 /* MPS and MRRS fields are of type 'RsvdP' for VFs, short-circuit out */ in pci_configure_mps()
2038 mps = 128; in pci_configure_mps()
2040 mps = 128 << dev->pcie_mpss; in pci_configure_mps()
2041 rc = pcie_set_mps(dev, mps); in pci_configure_mps()
2044 mps); in pci_configure_mps()
2052 mps = pcie_get_mps(dev); in pci_configure_mps()
2055 if (mps == p_mps) in pci_configure_mps()
2060 mps, pci_name(bridge), p_mps); in pci_configure_mps()
2065 * Fancier MPS configuration is done later by in pci_configure_mps()
[all …]
/openbmc/linux/drivers/net/wireless/quantenna/qtnfmac/pcie/
H A Dpcie.c145 qtnf_debugfs_add_entry(bus, "mps", qtnf_dbg_mps_show); in qtnf_pcie_fw_boot_done()
156 int mps_p, mps_o, mps_m, mps; in qtnf_tune_pcie_mps() local
159 /* current mps */ in qtnf_tune_pcie_mps()
162 /* maximum supported mps */ in qtnf_tune_pcie_mps()
165 /* suggested new mps value */ in qtnf_tune_pcie_mps()
166 mps = mps_m; in qtnf_tune_pcie_mps()
169 /* parent (bus) mps */ in qtnf_tune_pcie_mps()
174 mps = min(mps_m, mps_p); in qtnf_tune_pcie_mps()
178 ret = pcie_set_mps(pdev, mps); in qtnf_tune_pcie_mps()
180 pr_err("failed to set mps to %d, keep using current %d\n", in qtnf_tune_pcie_mps()
[all …]
/openbmc/linux/drivers/hwmon/pmbus/
H A DKconfig322 tristate "MPS MP2856"
324 If you say yes here you get hardware monitoring support for MPS
331 tristate "MPS MP2888"
333 If you say yes here you get hardware monitoring support for MPS
340 tristate "MPS MP2975"
342 If you say yes here you get hardware monitoring support for MPS
350 bool "Regulator support for MPS MP2975"
352 If you say yes here you get regulator support for MPS MP2975
356 tristate "MPS MP5023"
358 If you say yes here you get hardware monitoring support for MPS
[all …]
H A Dmp5023.c3 * Driver for MPS MP5023 Hot-Swap Controller
48 { .compatible = "mps,mp5023", },
65 MODULE_DESCRIPTION("PMBus driver for MPS MP5023 HSC");
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dmps,mp2629.yaml4 $id: http://devicetree.org/schemas/mfd/mps,mp2629.yaml#
22 - mps,mp2629
23 - mps,mp2733
56 compatible = "mps,mp2629";
/openbmc/qemu/hw/arm/
H A Dmps2.c193 make_ram(&mms->blockram, "mps.blockram", 0x01000000, 0x4000); in mps2_common_init()
194 make_ram_alias(&mms->blockram_m1, "mps.blockram_m1", in mps2_common_init()
196 make_ram_alias(&mms->blockram_m2, "mps.blockram_m2", in mps2_common_init()
198 make_ram_alias(&mms->blockram_m3, "mps.blockram_m3", in mps2_common_init()
206 make_ram(&mms->ssram1, "mps.ssram1", 0x0, 0x400000); in mps2_common_init()
207 make_ram_alias(&mms->ssram1_m, "mps.ssram1_m", &mms->ssram1, 0x400000); in mps2_common_init()
208 make_ram(&mms->ssram23, "mps.ssram23", 0x20000000, 0x400000); in mps2_common_init()
209 make_ram_alias(&mms->ssram23_m, "mps.ssram23_m", in mps2_common_init()
213 make_ram(&mms->blockram, "mps.blockram", 0x0, 0x40000); in mps2_common_init()
214 make_ram(&mms->ssram1, "mps.ssram1", 0x00400000, 0x00800000); in mps2_common_init()
[all …]
/openbmc/linux/Documentation/hwmon/
H A Dmp5023.rst8 * MPS MP5023
14 Publicly available at the MPS website : https://www.monolithicpower.com/en/mp5023.html
23 This driver implements support for Monolithic Power Systems, Inc. (MPS)
H A Dmp5990.rst8 * MPS MP5990
14 Publicly available at the MPS website : https://www.monolithicpower.com/en/mp5990.html
23 This driver implements support for Monolithic Power Systems, Inc. (MPS)
H A Dmp2856.rst8 * MPS MP2856
12 * MPS MP2857
23 This driver implements support for Monolithic Power Systems, Inc. (MPS)
/openbmc/linux/drivers/regulator/
H A Dmpq7920.c3 // mpq7920.c - regulator driver for mps mpq7920
218 if (of_property_read_bool(np, "mps,buck-ovp-disable")) { in mpq7920_parse_cb()
224 ret = of_property_read_u8(np, "mps,buck-phase-delay", &val); in mpq7920_parse_cb()
232 ret = of_property_read_u8(np, "mps,buck-softstart", &val); in mpq7920_parse_cb()
252 ret = of_property_read_u8(np, "mps,switch-freq", &freq); in mpq7920_parse_dt()
306 { .compatible = "mps,mpq7920"},
/openbmc/linux/drivers/mfd/
H A Dmp2629.c22 .of_compatible = "mps,mp2629_adc",
26 .of_compatible = "mps,mp2629_charger",
63 { .compatible = "mps,mp2629"},
/openbmc/qemu/hw/misc/macio/
H A Dpmu.c58 MOS6522PMUState *mps = MOS6522_PMU(&s->mos6522_pmu); in via_set_sr_int() local
59 MOS6522State *ms = MOS6522(mps); in via_set_sr_int()
500 MOS6522PMUState *mps = &s->mos6522_pmu; in pmu_update() local
501 MOS6522State *ms = MOS6522(mps); in pmu_update()
631 MOS6522PMUState *mps = &s->mos6522_pmu; in mos6522_pmu_read() local
632 MOS6522State *ms = MOS6522(mps); in mos6522_pmu_read()
642 MOS6522PMUState *mps = &s->mos6522_pmu; in mos6522_pmu_write() local
643 MOS6522State *ms = MOS6522(mps); in mos6522_pmu_write()
789 MOS6522PMUState *mps = container_of(s, MOS6522PMUState, parent_obj); in mos6522_pmu_portB_write() local
790 PMUState *ps = container_of(mps, PMUState, mos6522_pmu); in mos6522_pmu_portB_write()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/
H A Dtrivial-devices.yaml125 - mps,mp2856
127 - mps,mp2857
129 - mps,mp2888
131 - mps,mp2971
133 - mps,mp2973
135 - mps,mp2975
137 - mps,mp5990
/openbmc/linux/include/uapi/linux/
H A Datmmpc.h78 #define MPS 1 macro
91 #define HOLDING_TIME_DEFAULT 1200 /* same as MPS-p7 */
107 #define DATA_PLANE_PURGE 208 /* Data plane purge because of egress cache hit miss or dead MPS */
/openbmc/linux/net/bluetooth/
H A Dl2cap_core.c548 if (chan->mps == 0) in l2cap_le_rx_credits()
555 return (chan->imtu / chan->mps) + 1; in l2cap_le_rx_credits()
563 return DIV_ROUND_UP(chan->rx_avail - sdu_len, chan->mps); in l2cap_le_rx_credits()
572 /* Derive MPS from connection MTU to stop HCI fragmentation */ in l2cap_le_flowctl_init()
573 chan->mps = min_t(u16, chan->imtu, chan->conn->mtu - L2CAP_HDR_SIZE); in l2cap_le_flowctl_init()
583 /* L2CAP implementations shall support a minimum MPS of 64 octets */ in l2cap_ecred_init()
584 if (chan->mps < L2CAP_ECRED_MIN_MPS) { in l2cap_ecred_init()
585 chan->mps = L2CAP_ECRED_MIN_MPS; in l2cap_ecred_init()
776 rsp.mps = cpu_to_le16(chan->mps); in l2cap_chan_le_connect_reject()
4669 u16 dcid, mtu, mps, credits, result; l2cap_le_connect_rsp() local
4816 u16 dcid, scid, credits, mtu, mps; l2cap_le_connect_req() local
5005 u16 mtu, mps; l2cap_ecred_conn_req() local
5157 u16 mtu, mps, credits, result; l2cap_ecred_conn_rsp() local
5271 u16 mtu, mps, result; l2cap_ecred_reconf_req() local
[all...]
/openbmc/linux/drivers/net/ethernet/cavium/liquidio/
H A Dcn66xx_device.c72 enum octeon_pcie_mps mps) in lio_cn6xxx_setup_pcie_mps() argument
77 /* Read config register for MPS */ in lio_cn6xxx_setup_pcie_mps()
80 if (mps == PCIE_MPS_DEFAULT) { in lio_cn6xxx_setup_pcie_mps()
81 mps = ((val & (0x7 << 5)) >> 5); in lio_cn6xxx_setup_pcie_mps()
83 val &= ~(0x7 << 5); /* Turn off any MPS bits */ in lio_cn6xxx_setup_pcie_mps()
84 val |= (mps << 5); /* Set MPS */ in lio_cn6xxx_setup_pcie_mps()
88 /* Set MPS in DPI_SLI_PRT0_CFG to the same value. */ in lio_cn6xxx_setup_pcie_mps()
90 r64 |= (mps << 4); in lio_cn6xxx_setup_pcie_mps()
/openbmc/linux/net/atm/
H A Dmpc.h21 uint8_t mps_ctrl_addr[ATM_ESA_LEN]; /* MPS control ATM address */
32 uint8_t *mps_macs; /* array of MPS MAC addresses, >=1 */

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