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/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: /schemas/spi/spi-controller.yaml#
21 const: spi-gpio
23 sck-gpios:
[all …]
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt4 SPI bus. No SPI host is required for this to work. The down-side is that the
10 compatible: "spi-gpio"
11 cs-gpios: GPIOs to use for SPI chip select (output)
12 gpio-sck: GPIO to use for SPI clock (output)
14 gpio-mosi: GPIO to use for SPI MOSI line (output)
15 gpio-miso: GPIO to use for SPI MISO line (input)
18 spi-delay-us: Number of microseconds of delay between each CS transition
20 The GPIOs should be specified as required by the GPIO controller referenced.
27 soft-spi {
28 compatible = "spi-gpio";
[all …]
H A Dspi-bus.txt10 - #address-cells - number of cells required to define a chip select
12 - #size-cells - should be zero.
13 - compatible - name of SPI bus controller following generic names
15 - cs-gpios - (optional) gpios chip select.
20 flexible and non-standardized, it is left out of this binding with the
26 - num-cs : total number of chipselects
28 If cs-gpios is used the number of chip select will automatically increased
29 with max(cs-gpios > hw cs)
31 So if for example the controller has 2 CS lines, and the cs-gpios
34 cs-gpios = <&gpio1 0 0> <0> <&gpio1 1 0> <&gpio1 2 0>;
[all …]
/openbmc/u-boot/drivers/video/
H A Dhitachi_tx18d42vm_lcd.c1 // SPDX-License-Identifier: GPL-2.0+
18 static void lcd_panel_spi_write(int cs, int clk, int mosi, in lcd_panel_spi_write() argument
26 offset = (bits - 1) - i; in lcd_panel_spi_write()
27 gpio_direction_output(mosi, (data >> offset) & 1); in lcd_panel_spi_write()
48 int i, cs, clk, mosi, ret = 0; in hitachi_tx18d42vm_init() local
52 mosi = name_to_gpio(CONFIG_VIDEO_LCD_SPI_MOSI); in hitachi_tx18d42vm_init()
54 if (cs == -1 || clk == -1 || mosi == 1) { in hitachi_tx18d42vm_init()
56 return -EINVAL; in hitachi_tx18d42vm_init()
59 if (gpio_request(cs, "tx18d42vm-spi-cs") != 0 || in hitachi_tx18d42vm_init()
60 gpio_request(clk, "tx18d42vm-spi-clk") != 0 || in hitachi_tx18d42vm_init()
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/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-nhk15.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include "ste-nomadik-stn8815.dtsi"
13 compatible = "st,nomadik-nhk-15";
22 stmpe-i2c0 = &stmpe0;
23 stmpe-i2c1 = &stmpe1;
71 disable-sxtalo;
72 disable-mxtalo;
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 * platform_device->driver_data ... points to spi_gpio
27 * spi->controller_state ... reserved for bitbang framework code
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
36 struct gpio_desc *mosi; member
40 /*----------------------------------------------------------------------*/
47 * - The slow generic way: set up platform_data to hold the GPIO
48 * numbers used for MISO/MOSI/SCK, and issue procedure calls for
51 * - The quicker inlined way: only helps with platform GPIO code
52 * that inlines operations for constant GPIOs. This can give
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
23 uart1(cts), lcd-spi(cs1), pmu*
26 mpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
44 mpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso),
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm947189acdbmr.dts8 /dts-v1/;
26 compatible = "gpio-leds";
28 led-wps {
30 gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
33 led-5ghz {
35 gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
38 led-2ghz {
40 gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>;
44 gpio-keys {
45 compatible = "gpio-keys";
[all …]
H A Dbcm47081-buffalo-wzr-900dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-900DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-900dhp", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-900DHP (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
[all …]
H A Dbcm47081-buffalo-wzr-600dhp2.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-600DHP2
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-600dhp2", "brcm,bcm47081", "brcm,bcm4708";
16 model = "Buffalo WZR-600DHP2 (BCM47081)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
[all …]
H A Dbcm4708-buffalo-wzr-1750dhp.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1750DHP
9 /dts-v1/;
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
15 compatible = "buffalo,wzr-1750dhp", "brcm,bcm4708";
16 model = "Buffalo WZR-1750DHP (BCM4708)";
29 compatible = "spi-gpio";
30 num-chipselects = <1>;
31 sck-gpios = <&chipcommon 7 0>;
32 mosi-gpios = <&chipcommon 4 0>;
[all …]
H A Dbcm4708-buffalo-wzr-1166dhp-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 * DTS for Buffalo WZR-1166DHP and WZR-1166DHP2
12 #include "bcm5301x-nand-cs0-bch8.dtsi"
13 #include <dt-bindings/leds/common.h>
17 compatible = "spi-gpio";
18 num-chipselects = <1>;
19 sck-gpios = <&chipcommon 7 0>;
20 mosi-gpios = <&chipcommon 4 0>;
21 cs-gpios = <&chipcommon 6 0>;
22 #address-cells = <1>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsamsung,lms397kf04.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Linus Walleij <linus.walleij@linaro.org>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
25 reset-gpios: true
27 vci-supply:
31 vccio-supply:
37 spi-cpha: true
[all …]
H A Dsamsung,s6d27a1.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 - Markuss Broks <markuss.broks@gmail.com>
16 - $ref: panel-common.yaml#
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
32 reset-gpios: true
34 vci-supply:
38 vccio-supply:
44 spi-cpha: true
[all …]
H A Dsamsung,lms380kf01.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Linus Walleij <linus.walleij@linaro.org>
17 - $ref: panel-common.yaml#
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
33 reset-gpios: true
35 vci-supply:
39 vccio-supply:
45 spi-cpha: true
[all …]
/openbmc/u-boot/drivers/spi/
H A Dsoft_spi.c1 // SPDX-License-Identifier: GPL-2.0+
25 struct gpio_desc mosi; member
43 dm_gpio_set_value(&plat->sclk, bit); in soft_spi_scl()
53 dm_gpio_set_value(&plat->mosi, bit); in soft_spi_sda()
63 dm_gpio_set_value(&plat->cs, 0); in soft_spi_cs_activate()
64 dm_gpio_set_value(&plat->sclk, 0); in soft_spi_cs_activate()
65 dm_gpio_set_value(&plat->cs, 1); in soft_spi_cs_activate()
75 dm_gpio_set_value(&plat->cs, 0); in soft_spi_cs_deactivate()
95 /*-----------------------------------------------------------------------
98 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-cfa10049.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10049 is an expansion board for the CFA-10036 module, thus we
8 * need to include the CFA-10036 DTS.
10 #include "imx28-cfa10036.dts"
13 model = "Crystalfontz CFA-10049 Board";
17 compatible = "i2c-mux-gpio";
18 #address-cells = <1>;
19 #size-cells = <0>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&i2cmux_pins_cfa10049>;
[all …]
H A Dimx28-cfa10056.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * The CFA-10055 is an expansion board for the CFA-10036 module and
8 * CFA-10037, thus we need to include the CFA-10037 DTS.
10 #include "imx28-cfa10037.dts"
13 model = "Crystalfontz CFA-10056 Board";
16 spi-2 {
17 compatible = "spi-gpio";
18 pinctrl-names = "default";
19 pinctrl-0 = <&spi2_pins_cfa10056>;
21 sck-gpios = <&gpio2 16 0>;
[all …]
H A Dimx28-cfa10055.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * The CFA-10055 is an expansion board for the CFA-10036 module and
9 * CFA-10037, thus we need to include the CFA-10037 DTS.
11 #include "imx28-cfa10037.dts"
14 model = "Crystalfontz CFA-10055 Board";
17 spi-2 {
18 compatible = "spi-gpio";
19 pinctrl-names = "default";
20 pinctrl-0 = <&spi2_pins_cfa10055>;
22 sck-gpios = <&gpio2 16 0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Darmada-388-clearfog.dts11 * This file is dual-licensed: you can use it either under the terms
49 /dts-v1/;
50 #include <dt-bindings/input/input.h>
51 #include <dt-bindings/gpio/gpio.h>
52 #include "armada-388.dtsi"
53 #include "armada-38x-solidrun-microsom.dtsi"
57 compatible = "solidrun,clearfog-a1", "marvell,armada388",
61 /* So that mvebu u-boot can update the MAC addresses */
71 stdout-path = "serial0:115200n8";
74 reg_3p3v: regulator-3p3v {
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Dmmp3-dell-ariel.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
15 compatible = "dell,wyse-ariel", "marvell,mmp3";
22 #address-cells = <0x1>;
23 #size-cells = <0x1>;
35 compatible = "spi-gpio";
36 #address-cells = <1>;
37 #size-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7476.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
15 They typically don't provide a MOSI pin, simply reading out data
21 - adi,ad7091
22 - adi,ad7091r
23 - adi,ad7273
24 - adi,ad7274
25 - adi,ad7276
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 pinctrl-0 = <&sound_clk_pins>;
13 pinctrl-names = "default";
21 can0-stb-hog {
22 gpio-hog;
23 gpios = <RZG2L_GPIO(2, 2) GPIO_ACTIVE_HIGH>;
24 output-low;
25 line-name = "can0_stb";
[all …]

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