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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dstericsson,dma40.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsson DMA40 DMA Engine
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: dma-controller.yaml#
16 "#dma-cells":
32 10: Multi-Channel Display Engine MCDE RX
73 51: memcpy TX (to be used by the DMA driver for memcpy operations)
78 56: memcpy (to be used by the DMA driver for memcpy operations)
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H A Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
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H A Dqcom_hidma_mgmt.txt4 memcpy and memset capabilities. It has been designed for virtualized
7 Each HIDMA HW instance consists of multiple DMA channels. These channels
9 among channels based on the priority and weight assignments.
18 - compatible: "qcom,hidma-mgmt-1.0";
19 - reg: Address range for DMA device
20 - dma-channels: Number of channels supported by this DMA controller.
21 - max-write-burst-bytes: Maximum write burst in bytes that HIDMA can
22 occupy the bus for in a single transaction. A memcpy requested is
26 - max-read-burst-bytes: Maximum read burst in bytes that HIDMA can
27 occupy the bus for in a single transaction. A memcpy request is
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/openbmc/linux/drivers/net/wireless/ti/wl12xx/
H A Dscan.c1 // SPDX-License-Identifier: GPL-2.0-only
15 struct basic_scan_channel_params *channels, in wl1271_get_scan_channels() argument
18 struct conf_scan_settings *c = &wl->conf.scan; in wl1271_get_scan_channels()
23 i < req->n_channels && j < WL1271_SCAN_MAX_CHANNELS; in wl1271_get_scan_channels()
25 flags = req->channels[i]->flags; in wl1271_get_scan_channels()
27 if (!test_bit(i, wl->scan.scanned_ch) && in wl1271_get_scan_channels()
29 (req->channels[i]->band == band) && in wl1271_get_scan_channels()
32 * channels, even if not marked as such. in wl1271_get_scan_channels()
33 * In active scans, we only scan channels not in wl1271_get_scan_channels()
38 req->channels[i]->band, in wl1271_get_scan_channels()
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/openbmc/linux/drivers/dma/
H A Damba-pl08x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2010 ST-Ericsson SA
17 * The PL080 has 8 channels available for simultaneous use, and the PL081
18 * has only two channels. So on these DMA controllers the number of channels
27 * - CH_CONFIG register at different offset,
28 * - separate CH_CONTROL2 register for transfer size,
29 * - bigger maximum transfer size,
30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
31 * - no support for peripheral flow control.
45 * (Bursts are irrelevant for mem to mem transfers - there are no burst
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H A Dste_dma40.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) Ericsson AB 2007-2008
4 * Copyright (C) ST-Ericsson SA 2008-2010
5 * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson
6 * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson
9 #include <linux/dma-mapping.h>
32 * struct stedma40_platform_data - Configuration struct for the dma device.
36 * @disabled_channels: A vector, ending with -1, that marks physical channels
38 * @soft_lli_chans: A vector, that marks physical channels will use LLI by SW
42 * @num_of_soft_lli_chans: The number of channels that needs to be configured
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/openbmc/u-boot/drivers/dma/
H A Dsandbox-dma-test.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Direct Memory Access U-Class Simulation driver
13 #include <dma-uclass.h>
14 #include <dt-structs.h>
32 struct sandbox_dma_chan channels[SANDBOX_DMA_CH_CNT]; member
42 memcpy(dst, src, len); in sandbox_dma_transfer()
50 struct sandbox_dma_dev *ud = dev_get_priv(dma->dev); in sandbox_dma_of_xlate()
53 debug("%s(dma id=%u)\n", __func__, args->args[0]); in sandbox_dma_of_xlate()
55 if (args->args[0] >= SANDBOX_DMA_CH_CNT) in sandbox_dma_of_xlate()
56 return -EINVAL; in sandbox_dma_of_xlate()
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/openbmc/linux/include/linux/amba/
H A Dpl08x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
6 * Copyright (C) 2010 ST-Ericsson SA
32 * struct pl08x_channel_data - data structure to pass info between
84 * struct pl08x_platform_data - the platform configuration for the PL08x
86 * @slave_channels: the channels defined for the different devices on the
87 * platform, all inclusive, including multiplexed channels. The available
88 * physical channels will be multiplexed around these signals as they are
89 * requested, just enumerate all possible channels.
91 * @memcpy_burst_size: the appropriate burst size for memcpy operations
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/openbmc/linux/drivers/net/wireless/ti/wlcore/
H A Dscan.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009-2010 Nokia Corporation
35 mutex_lock(&wl->mutex); in wl1271_scan_complete_work()
37 if (unlikely(wl->state != WLCORE_STATE_ON)) in wl1271_scan_complete_work()
40 if (wl->scan.state == WL1271_SCAN_STATE_IDLE) in wl1271_scan_complete_work()
43 wlvif = wl->scan_wlvif; in wl1271_scan_complete_work()
47 * prevents just-finished scans from triggering the watchdog in wl1271_scan_complete_work()
51 wl->scan.state = WL1271_SCAN_STATE_IDLE; in wl1271_scan_complete_work()
52 memset(wl->scan.scanned_ch, 0, sizeof(wl->scan.scanned_ch)); in wl1271_scan_complete_work()
53 wl->scan.req = NULL; in wl1271_scan_complete_work()
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/openbmc/linux/drivers/net/netdevsim/
H A Dethtool.c1 // SPDX-License-Identifier: GPL-2.0
16 if (ns->ethtool.pauseparam.report_stats_rx) in nsim_get_pause_stats()
17 pause_stats->rx_pause_frames = 1; in nsim_get_pause_stats()
18 if (ns->ethtool.pauseparam.report_stats_tx) in nsim_get_pause_stats()
19 pause_stats->tx_pause_frames = 2; in nsim_get_pause_stats()
27 pause->autoneg = 0; /* We don't support ksettings, so can't pretend */ in nsim_get_pauseparam()
28 pause->rx_pause = ns->ethtool.pauseparam.rx; in nsim_get_pauseparam()
29 pause->tx_pause = ns->ethtool.pauseparam.tx; in nsim_get_pauseparam()
37 if (pause->autoneg) in nsim_set_pauseparam()
38 return -EINVAL; in nsim_set_pauseparam()
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/openbmc/linux/drivers/net/wireless/ti/wl1251/
H A Dcmd.c1 // SPDX-License-Identifier: GPL-2.0
15 * wl1251_cmd_send - Send command to firmware
30 cmd->id = id; in wl1251_cmd_send()
31 cmd->status = 0; in wl1251_cmd_send()
35 wl1251_mem_write(wl, wl->cmd_box_addr, buf, len); in wl1251_cmd_send()
45 ret = -ETIMEDOUT; in wl1251_cmd_send()
62 * wl1251_cmd_test - Send test command to firmware
90 wl1251_mem_read(wl, wl->cmd_box_addr, buf, buf_len); in wl1251_cmd_test()
94 if (cmd_answer->header.status != CMD_STATUS_SUCCESS) in wl1251_cmd_test()
96 cmd_answer->header.status); in wl1251_cmd_test()
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/openbmc/linux/drivers/media/pci/tw686x/
H A Dtw686x-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 VanguardiaSur - www.vanguardiasur.com.ar
10 * -----
12 * 1. Under stress-testing, it has been observed that the PCIe link
14 * to allow device hot-unplugging.
17 * including: scatter-gather, field and frame modes. However,
22 * Therefore, driver implements a dma_mode called 'memcpy' which
28 * a timer to limit the rate at which DMA is reset on DMA channels error.
41 #include "tw686x-regs.h"
50 * users wanting fine-grain control over the interrupt rate should
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/openbmc/linux/include/linux/platform_data/
H A Ddma-ep93xx.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #include <linux/dma-mapping.h>
10 * M2P channels.
25 /* M2M channels */
30 * struct ep93xx_dma_data - configuration data for the EP93xx dmaengine
36 * function. Note that this is only needed for slave/cyclic channels. For
37 * memcpy channels %NULL data should be passed.
46 * struct ep93xx_dma_chan_data - platform specific data for a DMA channel
58 * struct ep93xx_dma_platform_data - platform data for the dmaengine driver
59 * @channels: array of channels which are passed to the driver
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H A Dedma.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2006-2013 Texas Instruments.
19 * more than twice as many slots as event channels.
28 * The EDMA Channel Controller (CC) maps requests from channels into physical
30 * or software events, or by chaining). The two physical DMA channels provided
31 * by the TCs are thus shared by many logical channels.
45 EVENTQ_DEFAULT = -1
65 * Default queue is expected to be a low-priority queue.
74 /* List of channels allocated for memcpy, terminated with -1 */
/openbmc/linux/drivers/staging/greybus/
H A Daudio_gb.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright 2015-2016 Google Inc.
27 return -ENODATA; in gb_audio_gb_get_topology()
31 return -ENOMEM; in gb_audio_gb_get_topology()
62 memcpy(value, &resp.value, sizeof(*value)); in gb_audio_gb_get_control()
76 memcpy(&req.value, value, sizeof(req.value)); in gb_audio_gb_set_control()
108 u32 *format, u32 *rate, u8 *channels, in gb_audio_gb_get_pcm() argument
124 *channels = resp.channels; in gb_audio_gb_get_pcm()
132 u32 format, u32 rate, u8 channels, in gb_audio_gb_set_pcm() argument
140 req.channels = channels; in gb_audio_gb_set_pcm()
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/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dcommon-init.c2 * Copyright (c) 2008-2011 Atheros Communications Inc.
35 /* Some 2 GHz radios are actually tunable on 2312-2732
36 * on 5 MHz steps, we support the channels which we know
56 /* Some 5 GHz radios are actually tunable on XXXX-YYYY
57 * on 5 MHz steps, we support the channels which we know
127 struct ath_hw *ah = (struct ath_hw *)common->ah; in ath9k_cmn_init_channels_rates()
128 void *channels; in ath9k_cmn_init_channels_rates() local
134 if (ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { in ath9k_cmn_init_channels_rates()
135 channels = devm_kzalloc(ah->dev, in ath9k_cmn_init_channels_rates()
137 if (!channels) in ath9k_cmn_init_channels_rates()
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/openbmc/linux/drivers/net/wireless/ti/wl18xx/
H A Dscan.c1 // SPDX-License-Identifier: GPL-2.0-only
15 memcpy(cmd->passive, cmd_channels->passive, sizeof(cmd->passive)); in wl18xx_adjust_channels()
16 memcpy(cmd->active, cmd_channels->active, sizeof(cmd->active)); in wl18xx_adjust_channels()
17 cmd->dfs = cmd_channels->dfs; in wl18xx_adjust_channels()
18 cmd->passive_active = cmd_channels->passive_active; in wl18xx_adjust_channels()
20 memcpy(cmd->channels_2, cmd_channels->channels_2, in wl18xx_adjust_channels()
21 sizeof(cmd->channels_2)); in wl18xx_adjust_channels()
22 memcpy(cmd->channels_5, cmd_channels->channels_5, in wl18xx_adjust_channels()
23 sizeof(cmd->channels_5)); in wl18xx_adjust_channels()
36 ret = -ENOMEM; in wl18xx_scan_send()
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/openbmc/linux/arch/arm/mach-ep93xx/
H A Ddma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-ep93xx/dma.c
9 * This work is based on the original dma-m2p implementation with
18 #include <linux/dma-mapping.h>
24 #include <linux/platform_data/dma-ep93xx.h>
33 * DMA M2P channels.
36 * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive).
38 * I2S contains 3 Tx and 3 Rx DMA Channels
39 * AAC contains 3 Tx and 3 Rx DMA Channels
40 * UART1 contains 1 Tx and 1 Rx DMA Channels
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/openbmc/qemu/audio/
H A Djackaudio.c28 #include "qemu/main-loop.h"
47 int channels; member
96 static void qjack_buffer_create(QJackBuffer *buffer, int channels, int frames) in qjack_buffer_create() argument
98 buffer->channels = channels; in qjack_buffer_create()
99 buffer->frames = frames; in qjack_buffer_create()
100 buffer->used = 0; in qjack_buffer_create()
101 buffer->rptr = 0; in qjack_buffer_create()
102 buffer->wptr = 0; in qjack_buffer_create()
103 buffer->data = g_new(float *, channels); in qjack_buffer_create()
104 for (int i = 0; i < channels; ++i) { in qjack_buffer_create()
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/openbmc/linux/sound/soc/codecs/
H A Dhdmi-codec.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
16 #include <sound/hdmi-codec.h>
21 #define HDMI_CODEC_CHMAP_IDX_UNKNOWN -1
59 { .channels = 2,
64 /* Channel maps for multi-channel playbacks, up to 8 n_ch */
66 { .channels = 2, /* CA_ID 0x00 */
68 { .channels = 4, /* CA_ID 0x01 */
71 { .channels = 4, /* CA_ID 0x02 */
74 { .channels = 4, /* CA_ID 0x03 */
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/openbmc/linux/drivers/net/wireless/ath/wcn36xx/
H A Dsmd.c145 WCN36XX_CFG_VAL(ASD_TRIGGER_THRESHOLD, -60),
189 return -ENOMEM; in put_cfg_tlv_u32()
192 entry = (struct wcn36xx_hal_cfg *) (wcn->hal_buf + *len); in put_cfg_tlv_u32()
193 entry->id = id; in put_cfg_tlv_u32()
194 entry->len = sizeof(u32); in put_cfg_tlv_u32()
195 entry->pad_bytes = 0; in put_cfg_tlv_u32()
196 entry->reserve = 0; in put_cfg_tlv_u32()
211 bss_params->nw_type = WCN36XX_HAL_11A_NW_TYPE; in wcn36xx_smd_set_bss_nw_type()
212 else if (sta && sta->deflink.ht_cap.ht_supported) in wcn36xx_smd_set_bss_nw_type()
213 bss_params->nw_type = WCN36XX_HAL_11N_NW_TYPE; in wcn36xx_smd_set_bss_nw_type()
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/openbmc/linux/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dscan.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2012-2014, 2018-2023 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 #include "iwl-io.h"
32 /* adaptive dwell default APs number in social channels (1, 6, 11) */
34 /* number of scan channels */
38 /* adaptive dwell number of APs override mask for social channels */
40 /* adaptive dwell number of APs override for p2p friendly GO channels */
42 /* adaptive dwell number of APs override for social channels */
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/openbmc/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00config.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
53 memcpy(conf.mac, mac, ETH_ALEN); in rt2x00lib_config_intf()
57 memcpy(conf.bssid, bssid, ETH_ALEN); in rt2x00lib_config_intf()
60 if (mac || (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count)) in rt2x00lib_config_intf()
62 if (bssid || (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count)) in rt2x00lib_config_intf()
65 rt2x00dev->ops->lib->config_intf(rt2x00dev, intf, &conf, flags); in rt2x00lib_config_intf()
79 erp.short_preamble = bss_conf->use_short_preamble; in rt2x00lib_config_erp()
80 erp.cts_protection = bss_conf->use_cts_prot; in rt2x00lib_config_erp()
82 erp.slot_time = bss_conf->use_short_slot ? SHORT_SLOT_TIME : SLOT_TIME; in rt2x00lib_config_erp()
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/openbmc/linux/sound/core/oss/
H A Dpcm_plugin.c2 * PCM Plug-In shared (kernel/library) code
4 * Copyright (c) 2000 by Abramo Bagnara <abramo@alsa-project.org>
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
35 #define snd_pcm_plug_first(plug) ((plug)->runtime->oss.plugin_first)
36 #define snd_pcm_plug_last(plug) ((plug)->runtime->oss.plugin_last)
40 * all "resampling" requests within +-5%
57 if (plugin->stream == SNDRV_PCM_STREAM_PLAYBACK) { in snd_pcm_plugin_alloc()
58 format = &plugin->src_format; in snd_pcm_plugin_alloc()
60 format = &plugin->dst_format; in snd_pcm_plugin_alloc()
62 width = snd_pcm_format_physical_width(format->format); in snd_pcm_plugin_alloc()
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/openbmc/linux/sound/soc/sof/
H A Dipc3-control.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
10 #include "sof-priv.h"
11 #include "sof-audio.h"
12 #include "ipc3-priv.h"
18 struct snd_sof_dev *sdev = snd_soc_component_get_drvdata(scontrol->scomp); in sof_ipc3_set_get_kcontrol_data()
19 struct sof_ipc_ctrl_data *cdata = scontrol->ipc_control_data; in sof_ipc3_set_get_kcontrol_data()
20 const struct sof_ipc_ops *iops = sdev->ipc->ops; in sof_ipc3_set_get_kcontrol_data()
27 list_for_each_entry(swidget, &sdev->widget_list, list) { in sof_ipc3_set_get_kcontrol_data()
28 if (swidget->comp_id == scontrol->comp_id) { in sof_ipc3_set_get_kcontrol_data()
35 dev_err(sdev->dev, "%s: can't find widget with id %d\n", __func__, in sof_ipc3_set_get_kcontrol_data()
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