| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/falcon/ |
| H A D | ga102.c | 107 ga102_flcn_fw_boot(struct nvkm_falcon_fw *fw, u32 *mbox0, u32 *mbox1, u32 mbox0_ok, u32 irqsclr) in ga102_flcn_fw_boot() argument
116 return gm200_flcn_fw_boot(fw, mbox0, mbox1, mbox0_ok, irqsclr); in ga102_flcn_fw_boot()
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| H A D | gm200.c | 221 u32 mbox0, mbox1; in gm200_flcn_fw_boot() local
238 mbox1 = nvkm_falcon_rd32(falcon, 0x044); in gm200_flcn_fw_boot()
239 if (FLCN_ERRON(falcon, ret || mbox0 != mbox0_ok, "mbox %08x %08x", mbox0, mbox1)) in gm200_flcn_fw_boot()
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| /openbmc/qemu/hw/scsi/ |
| H A D | lsi53c895a.c | 258 uint8_t mbox1; member
372 s->mbox1 = 0; in lsi_soft_reset()
1712 case 0x17: /* MBOX1 */ in lsi_reg_readb()
1713 ret = s->mbox1; in lsi_reg_readb()
1969 case 0x17: /* MBOX1 */ in lsi_reg_writeb()
1970 s->mbox1 = val; in lsi_reg_writeb()
2258 VMSTATE_UINT8(mbox1, LSIState),
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| /openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| H A D | falcon.h | 94 u32 *mbox0, u32 *mbox1, u32 mbox0_ok, u32 irqsclr);
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| /openbmc/u-boot/include/ |
| H A D | tsi148.h | 149 unsigned int mbox1; /* 0x614 */ member
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| /openbmc/linux/drivers/crypto/marvell/octeontx2/ |
| H A D | otx2_cptpf_main.c | 275 "CPTVFPF Mbox1", cptpf); in cptpf_register_vfpf_intr()
278 "IRQ registration failed for PFVF mbox1 irq\n"); in cptpf_register_vfpf_intr()
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| /openbmc/linux/drivers/comedi/drivers/ |
| H A D | plx9080.h | 590 * the MBOX0 and MBOX1 registers if the I2O feature is enabled, but MBOX0 and
591 * MBOX1 are accessible via alternative offsets.
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| /openbmc/linux/drivers/scsi/ |
| H A D | qlogicpti.h | 18 #define MBOX1 0x082UL macro
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| H A D | qlogicpti.c | 210 case 2: sbus_writew(param[1], qpti->qregs + MBOX1); in qlogicpti_mbox_command()
269 case 2: param[1] = sbus_readw(qpti->qregs + MBOX1); in qlogicpti_mbox_command()
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| H A D | ncr53c8xx.h | 487 #define FE_ISTAT1 (1<<25) /* Have ISTAT1, MBOX0, MBOX1 registers */
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| /openbmc/linux/arch/mips/include/asm/octeon/ |
| H A D | cvmx-sriox-defs.h | 443 uint64_t mbox1:2; member
473 uint64_t mbox1:2;
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| /openbmc/linux/drivers/net/ethernet/marvell/octeontx2/nic/ |
| H A D | otx2_pf.c | 711 /* Register MBOX1 interrupt handler */ in otx2_register_pfvf_mbox_intr()
715 "RVUPF%d_VF Mbox1", rvu_get_pf(pf->pcifunc)); in otx2_register_pfvf_mbox_intr()
717 snprintf(irq_name, NAME_SIZE, "RVUPF_VF Mbox1"); in otx2_register_pfvf_mbox_intr()
724 "RVUPF: IRQ registration failed for PFVF mbox1 irq\n"); in otx2_register_pfvf_mbox_intr()
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| /openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/ |
| H A D | rvu.c | 2974 /* Register MBOX1 interrupt. MBOX1 IRQ number follows MBOX0 so in rvu_register_interrupts()
2978 sprintf(&rvu->irq_name[offset * NAME_SIZE], "RVUAFVF Mbox1"); in rvu_register_interrupts()
2985 "RVUAF: IRQ registration failed for Mbox1\n"); in rvu_register_interrupts()
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| /openbmc/linux/Documentation/scsi/ |
| H A D | ChangeLog.sym53c8xx | 459 - Define some new IO registers for the 896 (istat1, mbox0, mbox1)
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| /openbmc/linux/drivers/scsi/sym53c8xx_2/ |
| H A D | sym_defs.h | 75 #define FE_ISTAT1 (1<<30) /* Have ISTAT1, MBOX0, MBOX1 registers */
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| /openbmc/linux/drivers/net/ethernet/chelsio/cxgb4/ |
| H A D | cxgb4_debugfs.c | 3785 { "mbox1", &mbox_debugfs_fops, 0600, 1 }, in t4_setup_debugfs()
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