/openbmc/linux/Documentation/devicetree/bindings/mailbox/ |
H A D | ti,omap-mailbox.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Suman Anna <s-anna@ti.com> 35 lines can also be routed to different processor sub-systems on DRA7xx as they 49 within a SoC. The sub-mailboxes (actual communication channels) are 56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt 59 phandle to the intended sub-mailbox child node to be used for communication. 60 The equivalent "mbox-names" property value can be used to give a name to the [all …]
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/openbmc/linux/arch/arm64/boot/dts/ti/ |
H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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H A D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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H A D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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H A D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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H A D | k3-j784s4-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 bootph-all; 11 compatible = "ti,k2g-sci"; 12 ti,host-id = <12>; 14 mbox-names = "rx", "tx"; 19 reg-names = "debug_messages"; 22 k3_pds: power-controller { 23 bootph-all; [all …]
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H A D | k3-am65-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 mcu_conf: scm-conf@40f00000 { 10 compatible = "syscon", "simple-mfd"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 compatible = "ti,am654-phy-gmii-sel"; 19 #phy-cells = <1>; 25 compatible = "pinctrl-single"; 27 #pinctrl-cells = <1>; [all …]
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H A D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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H A D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | dra7.dtsi | 2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 16 #address-cells = <2>; 17 #size-cells = <2>; 20 interrupt-parent = <&crossbar_mpu>; 47 compatible = "arm,armv7-timer"; 52 interrupt-parent = <&gic>; 55 gic: interrupt-controller@48211000 { 56 compatible = "arm,cortex-a15-gic"; [all …]
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H A D | dm816x.dtsi | 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/pinctrl/omap.h> 12 interrupt-parent = <&intc>; 13 #address-cells = <1>; 14 #size-cells = <1>; 28 #address-cells = <1>; 29 #size-cells = <0>; 31 compatible = "arm,cortex-a8"; 38 compatible = "arm,cortex-a8-pmu"; 47 compatible = "ti,omap-infra"; [all …]
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H A D | omap3.dtsi | 4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/pinctrl/omap.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <1>; 19 #size-cells = <1>; 32 #address-cells = <1>; 33 #size-cells = <0>; 36 compatible = "arm,cortex-a8"; [all …]
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H A D | am33xx.dtsi | 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/pinctrl/am33xx.h> 13 #include <dt-bindings/clock/am3.h> 17 interrupt-parent = <&intc>; 18 #address-cells = <1>; 19 #size-cells = <1>; 32 d-can0 = &dcan0; 33 d-can1 = &dcan1; 45 #address-cells = <1>; [all …]
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H A D | am4372.dtsi | 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&wakeupgen>; 32 #address-cells = <1>; 33 #size-cells = <0>; 35 compatible = "arm,cortex-a9"; 40 clock-names = "cpu"; 42 clock-latency = <300000>; /* From omap-cpufreq driver */ 46 gic: interrupt-controller@48241000 { [all …]
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/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap2420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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H A D | omap2430.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4-wkup", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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H A D | dra7-l4.dtsi | 2 compatible = "ti,dra7-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_coreaon>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 17 compatible = "simple-pm-bus"; 18 #address-cells = <1>; 19 #size-cells = <1>; 50 target-module@2000 { /* 0x4a002000, ap 3 08.0 */ [all …]
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H A D | dm816x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 #include <dt-bindings/bus/ti-sysc.h> 4 #include <dt-bindings/clock/dm816.h> 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/pinctrl/omap.h> 10 interrupt-parent = <&intc>; 11 #address-cells = <1>; 12 #size-cells = <1>; 26 #address-cells = <1>; 27 #size-cells = <0>; [all …]
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H A D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 33 #address-cells = <1>; [all …]
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/openbmc/linux/drivers/mailbox/ |
H A D | omap-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2006-2009 Nokia Corporation. All rights reserved. 6 * Copyright (C) 2013-2021 Texas Instruments Incorporated - https://www.ti.com 9 * Suman Anna <s-anna@ti.com> 22 #include <linux/omap-mailbox.h> 68 struct omap_mbox *mbox; member 125 if (!chan || !chan->con_priv) in mbox_chan_to_omap_mbox() 128 return (struct omap_mbox *)chan->con_priv; in mbox_chan_to_omap_mbox() 134 return __raw_readl(mdev->mbox_base + ofs); in mbox_read_reg() 140 __raw_writel(val, mdev->mbox_base + ofs); in mbox_write_reg() [all …]
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