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/openbmc/linux/Documentation/devicetree/bindings/ipmi/
H A Daspeed,ast2400-kcs-bmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
[all …]
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
15 - if:
17 - required:
18 - aspeed,lpc-io-reg
19 - required:
20 - aspeed,lpc-interrupts
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
15 reg = <0x80000000 0x20000000>;
18 reserved-memory {
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Daspeed-bmc-tyan-s8036.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s8036-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
H A Daspeed-bmc-asrock-romed8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "asrock,romed8hm3-bmc", "aspeed,ast2500";
17 stdout-path = &uart5;
22 reg = <0x80000000 0x20000000>;
26 compatible = "gpio-leds";
30 linux,default-trigger = "timer";
[all …]
H A Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
23 reg = <0x80000000 0x20000000>;
27 compatible = "gpio-leds";
[all …]
H A Daspeed-bmc-amd-daytonax.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "amd,daytonax-bmc", "aspeed,ast2500";
13 reg = <0x80000000 0x20000000>;
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
[all …]
H A Daspeed-bmc-asrock-spc621d8hm3.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,spc621d8hm3-bmc", "aspeed,ast2500";
21 stdout-path = &uart5;
26 reg = <0x80000000 0x20000000>;
30 compatible = "gpio-leds";
[all …]
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
H A Daspeed-bmc-tyan-s7106.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 compatible = "tyan,s7106-bmc", "aspeed,ast2500";
13 stdout-path = &uart5;
19 reg = <0x80000000 0x20000000>;
22 reserved-memory {
23 #address-cells = <1>;
[all …]
H A Daspeed-bmc-facebook-elbert.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "ast2600-facebook-netbmc-common.dtsi"
10 compatible = "facebook,elbert-bmc", "aspeed,ast2600";
19 * 8 child channels of PCA9548 2-0075.
31 * 8 child channels of PCA9548 5-0075.
44 stdout-path = &uart5;
48 num-chipselects = <1>;
49 cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
59 aspeed,lpc-io-reg = <0xca8>;
[all …]
H A Daspeed-bmc-ibm-bonnell.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,bonnell-bmc", "aspeed,ast2600";
23 stdout-path = &uart5;
29 reg = <0x80000000 0x40000000>;
32 reserved-memory {
[all …]
H A Daspeed-bmc-vegman.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
13 stdout-path = &uart5;
18 reg = <0x80000000 0x20000000>;
21 reserved-memory {
22 #address-cells = <1>;
23 #size-cells = <1>;
29 compatible = "shared-dma-pool";
35 reg = <0x9eff0000 0x10000>;
[all …]
H A Daspeed-bmc-opp-tacoma.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,tacoma-bmc", "aspeed,ast2600";
15 stdout-path = &uart5;
21 reg = <0x80000000 0x40000000>;
24 reserved-memory {
[all …]
/openbmc/qemu/hw/ppc/
H A Dpnv_lpc.c2 * QEMU PowerPC PowerNV LPC controller
27 #include "hw/qdev-properties.h"
52 /* LPC HC registers */
105 const char compat[] = "ibm,power8-lpc\0ibm,lpc"; in pnv_lpc_dt_xscom()
109 uint32_t reg[] = { in pnv_lpc_dt_xscom() local
119 _FDT((fdt_setprop(fdt, offset, "reg", reg, sizeof(reg)))); in pnv_lpc_dt_xscom()
120 _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 2))); in pnv_lpc_dt_xscom()
121 _FDT((fdt_setprop_cell(fdt, offset, "#size-cells", 1))); in pnv_lpc_dt_xscom()
130 const char compat[] = "ibm,power9-lpcm-opb\0simple-bus"; in pnv_dt_lpc()
131 const char lpc_compat[] = "ibm,power9-lpc\0ibm,lpc"; in pnv_dt_lpc()
[all …]
/openbmc/linux/drivers/char/ipmi/
H A Dkcs_bmc_aspeed.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
11 #include <linux/io.h>
27 #define DEVICE_NAME "ast-kcs-bmc"
34 * LPCyE Enable LPC channel y
35 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
36 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
37 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
38 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
[all …]
/openbmc/hiomapd/
H A Dtransport_mbox.c1 // SPDX-License-Identifier: Apache-2.0
31 #include "lpc.h"
34 #pragma GCC diagnostic ignored "-Wpointer-arith"
51 { -1, MBOX_R_SYSTEM_ERROR },
64 { -1, MBOX_R_SYSTEM_ERROR },
78 rc = -rc; in mbox_xlate_errno()
80 for(entry = errno_maps[context->version]; entry->rc != -1; entry++) { in mbox_xlate_errno()
81 if (rc == entry->rc) { in mbox_xlate_errno()
82 return entry->mbox_errno; in mbox_xlate_errno()
86 return entry->mbox_errno; in mbox_xlate_errno()
[all …]
/openbmc/u-boot/arch/x86/cpu/intel_common/
H A Dlpc.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <asm/io.h>
31 /* Enable port 80 POST on LPC */ in enable_port80_on_lpc()
37 * lpc_early_init() - set up LPC serial ports and other early things
39 * @dev: LPC device
40 * @return 0 if OK, -ve on error
44 struct udevice *pch = dev->parent; in lpc_common_early_init()
52 count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev), in lpc_common_early_init()
53 "intel,gen-dec", (u32 *)values, in lpc_common_early_init()
56 return -EINVAL; in lpc_common_early_init()
[all …]
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
61 * at what IO port and interrupt number the host side will appear
62 * to the host on the Host <-> BMC LPC bus. It could be different on a
66 static inline u8 aspeed_vuart_readb(struct aspeed_vuart *vuart, u8 reg) in aspeed_vuart_readb() argument
68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
71 static inline void aspeed_vuart_writeb(struct aspeed_vuart *vuart, u8 val, u8 reg) in aspeed_vuart_writeb() argument
73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
91 return -EINVAL; in aspeed_vuart_set_lpc_address()
121 u8 reg; in sirq_show() local
123 reg = aspeed_vuart_readb(vuart, ASPEED_VUART_GCRB); in sirq_show()
[all …]
/openbmc/u-boot/board/aspeed/evb_ast2600/
H A Devb_ast2600.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <asm/io.h>
37 /* set lpc snoop #0 to port 0x80 */ in port80h_snoop_init()
46 /* enable lpc snoop #0 and SIOGIO */ in port80h_snoop_init()
62 #define SCU_414 0x414 /* Multi-function Pin Control #5 */ in sgpio_init()
75 u32 reg; in espi_init() local
77 /* skip eSPI init if LPC mode is selected */ in espi_init()
78 reg = readl(SCU_BASE + 0x510); in espi_init()
79 if (reg & BIT(6)) in espi_init()
101 reg = readl(ESPI_BASE + 0x000); in espi_init()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dast2400.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g4.dtsi
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm926ej-s";
44 reg = <0>;
50 reg = <0x40000000 0>;
54 compatible = "simple-bus";
[all …]
H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
44 reg = <0>;
50 reg = <0x80000000 0>;
54 compatible = "simple-bus";
[all …]
/openbmc/u-boot/board/aspeed/ast2600_dcscm/
H A Dast2600_dcscm.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <asm/io.h>
37 /* set lpc snoop #0 to port 0x80 */ in port80h_snoop_init()
46 /* enable lpc snoop #0 and SIOGIO */ in port80h_snoop_init()
62 #define SCU_414 0x414 /* Multi-function Pin Control #5 */ in sgpio_init()
75 u32 reg; in espi_init() local
77 /* skip eSPI init if LPC mode is selected */ in espi_init()
78 reg = readl(SCU_BASE + 0x510); in espi_init()
79 if (reg & BIT(6)) in espi_init()
101 reg = readl(ESPI_BASE + 0x000); in espi_init()
[all …]
/openbmc/linux/drivers/reset/
H A Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
17 #include <linux/io.h>
20 #include <linux/reset-controller.h>
21 #include <linux/reset/reset-simple.h>
38 u32 reg; in reset_simple_update() local
40 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
42 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
43 if (assert ^ data->active_low) in reset_simple_update()
44 reg |= BIT(offset); in reset_simple_update()
[all …]
/openbmc/u-boot/board/aspeed/ast2600_intel/
H A Dintel.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <asm/io.h>
33 /* LPC registers */
76 /* set lpc snoop #0 to port 0x80 */ in snoop_init()
88 /* enable lpc snoop #0 and SIOGIO */ in snoop_init()
163 /* GPIO G6 is also an open-drain output so set it as an input. */ in gpio_init()
170 u32 reg; in espi_init() local
191 reg = readl(ESPI_CTRL); in espi_init()
192 reg |= 0xef; in espi_init()
193 writel(reg, ESPI_CTRL); in espi_init()
[all …]

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