|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.16 |
|
| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
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Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
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| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
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|
Revision tags: v6.6.16 |
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| #
fde0cde4 |
| 31-Jan-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EE
ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|
|
Revision tags: v6.6.35, v6.6.34, v6.6.33, v6.6.32, v6.6.31, v6.6.30, v6.6.29, v6.6.28, v6.6.27, v6.6.26, v6.6.25, v6.6.24, v6.6.23 |
|
| #
cdeefb40 |
| 12-Feb-2024 |
Zev Weiss <zev@bewilderbeest.net> |
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
externa
ARM: dts: aspeed: asrock: Add BIOS SPI flash chips
On e3c246d4i, e3c256d4i, romed8hm3, and spc621d8hm3 the host firmware
flash is accessible to the BMC via the AST2500 SPI1 interface with an
external GPIO-controlled mux switching the flash chip between the host
and the BMC.
The default state of the mux GPIO leaves it connected to the host, so
the BMC's attempt to bind a driver to it during its boot sequence will
fail, but a write to a sysfs 'bind' file after toggling the mux GPIO
(along with whatever other preparatory steps are required) can later
allow it to be attached and accessed by the BMC. It's not an ideal
arrangement, but in the absence of DT overlays or any other
alternative it is at least a functional one, if somewhat clumsily so.
Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
show more ...
|