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/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7280-lpasscorecc.yaml139 <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
141 power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
181 lpass_aon: clock-controller@3380000 {
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-chrome-common.dtsi49 &lpass_aon {
H A Dsc7280.dtsi2278 clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
2279 <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
2284 <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
2331 clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>,
2332 <&lpass_aon LPASS_AON_CC_TX_MCLK_2X_CLK>,
2337 <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
2383 <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
2385 power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
2398 clocks = <&lpass_aon LPASS_AON_CC_TX_MCLK_CLK>;
2402 <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
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