| /openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/ |
| H A D | pxaregs.c | 2 * pxaregs - tool to display and modify PXA250's registers at runtime
4 * (c) Copyright 2002 by M&N Logistik-Lösungen Online GmbH
9 * Please send patches to h.schurig, working at mn-logistik.de
10 * - added fix from Bernhard Nemec
11 * - i2c registers from Stefan Eletzhofer
25 #include <linux/i2c-dev.h>
29 static int fd = -1;
85 { "PMCR", 0x40F00000, 0, 0xffffffff, 'x', "Power Manager Control Register (3-23)" },
88 { "PSSR", 0x40F00004, 0, 0xffffffff, 'x', "Power Manager Sleep Status Register (3-29)" },
95 { "PSPR", 0x40F00008, 0, 0xffffffff, 'x', "Power Manager Scratch Pad Register (3-30)" },
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| /openbmc/u-boot/drivers/gpio/ |
| H A D | mvgpio.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Written-by: Ajay Bhargav <contact@8051projects.net>
20 u32 gplr; /* Pin Level Register - 0x0000 */
22 u32 gpdr; /* Pin Direction Register - 0x000C */
24 u32 gpsr; /* Pin Output Set Register - 0x0018 */
26 u32 gpcr; /* Pin Output Clear Register - 0x0024 */
28 u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */
30 u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */
32 u32 gedr; /* Edge Detect Status Register - 0x0048 */
34 u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */
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| /openbmc/qemu/include/hw/gpio/ |
| H A D | nrf51_gpio.h | 2 * nRF51 System-on-Chip general purpose input/output register definition
6 * + Unnamed GPIO inputs 0-31: Set tri-state input level for GPIO pin.
7 * Level -1: Externally Disconnected/Floating; Pull-up/down will be regarded
8 * Level 0: Input externally driven LOW
9 * Level 1: Input externally driven HIGH
10 * + Unnamed GPIO outputs 0-31:
11 * Level -1: Disconnected/Floating
12 * Level 0: Driven LOW
13 * Level 1: Driven HIGH
16 * + The nRF51 GPIO output driver supports two modes, standard and high-current
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| /openbmc/qemu/hw/gpio/ |
| H A D | nrf51_gpio.c | 2 * nRF51 System-on-Chip general purpose input/output register definition
7 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
10 * the COPYING file in the top-level directory.
23 * given the current configuration and logic level.
24 * It is not differentiated between standard and "high"(-power) drive modes.
26 static bool is_connected(uint32_t config, uint32_t level) in is_connected() argument
36 state = level != 0; in is_connected()
39 state = level == 0; in is_connected()
56 return -1; in pull_value()
60 bool connected, bool level) in update_output_irq() argument
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| /openbmc/phosphor-power/phosphor-regulators/docs/config_file/ |
| H A D | phase_fault_detection.md | 5 Specifies how to detect and log redundant phase faults in a voltage regulator.
14 The technique used to detect a phase fault varies depending on the regulator
20 This provides "de-glitching" to ignore transient hardware problems.
24 - Use the [if](if.md) action to implement the high level behavior "if a fault is
26 - Detecting the fault
27 - Use a comparison action like [i2c_compare_bit](i2c_compare_bit.md) to detect
29 - Logging the error
30 - Use the [i2c_capture_bytes](i2c_capture_bytes.md) action to capture
32 - Use the [log_phase_fault](log_phase_fault.md) action to log a phase fault
38 - Use the "rule_id" property to specify a standard rule to run.
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| H A D | rule.md | 11 - Actions that set the output voltage of a regulator rail
12 - Actions that read all the sensors of a regulator rail
13 - Actions that detect down-level hardware using version registers
14 - Actions that detect phase faults
19 …:------- | :------: | :---------------------------- | :-------------------------------------------…
21 … | Unique ID for this rule. Can only contain letters (A-Z, a-z), numbers (0-9), and und…
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| /openbmc/phosphor-power/phosphor-regulators/src/ |
| H A D | phase_fault_detection.cpp | 8 * http://www.apache.org/licenses/LICENSE-2.0
41 * "de-glitching" to ignore transient hardware problems.
59 // Execute the actions to detect phase faults in execute()
75 "Unable to detect phase faults in regulator " + in execute()
81 Entry::Level::Warning, services, in execute()
132 Entry::Level severity = (faultType == PhaseFaultType::n) in logPhaseFault()
133 ? Entry::Level::Warning in logPhaseFault()
134 : Entry::Level::Informational; in logPhaseFault()
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| /openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| H A D | psci.S | 1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <asm/arch-armv7/generictimer.h>
96 @ Affinity level 2 - Cluster: only one cluster in LS1021xa.
100 @ Affinity level 1 - Processors: should be in 0xf00 format.
105 @ Affinity level 0 - CPU: only 0, 1 are valid in LS1021xa.
135 @ Detect target CPU state
209 @ Verify Affinity level
224 @ Detect target CPU state
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| /openbmc/qemu/scripts/qemugdb/ |
| H A D | mtree.py | 10 # later. See the COPYING file in the top-level directory.
12 # 'qemu mtree' -- display the memory hierarchy
22 QEMU can be built with native Int128 support so we need to detect
50 def print_item(self, ptr, offset = gdb.Value(0), level = 0): argument
63 gdb.write('%s%016x-%016x %s%s (@ %s)\n'
64 % (' ' * level,
66 int(addr + (size - 1)),
74 (' ' * level,
82 level += 1
84 self.print_item(subregion, addr, level)
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| /openbmc/phosphor-power/phosphor-power-sequencer/docs/config_file/ |
| H A D | README.md | 1 # phosphor-power-sequencer Configuration File
5 - [Overview](#overview)
6 - [Data Format](#data-format)
7 - [Name](#name)
8 - [Contents](#contents)
9 - [Installation](#installation)
13 The `phosphor-power-sequencer` application is controlled by a configuration file
17 This information is used to power the system on/off, detect
24 - Assume this is a single chassis system.
25 - Assume the standard [GPIO names](../named_gpios.md) are used to power the
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| /openbmc/qemu/tests/docker/ |
| H A D | test-tsan | 1 #!/bin/bash -e
10 # Originally based on test-quick from Fam Zheng <famz@redhat.com>
14 # the top-level directory.
21 tsan_log_dir="/tmp/qemu-test/build/tsan"
22 mkdir -p $tsan_log_dir > /dev/null || true
23 EXTRA_CONFIGURE_OPTS="${EXTRA_CONFIGURE_OPTS} --enable-tsan \
24 --cc=clang --cxx=clang++ \
25 --disable-werror --extra-cflags=-O0"
26 # detect deadlocks is false currently simply because
31 tsan_opts="suppressions=/tmp/qemu-test/src/tests/tsan/suppressions.tsan\
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| /openbmc/docs/designs/ |
| H A D | psu-monitoring.md | 7 Created: 2019-06-17
16 validate configurations, report invalid configurations, detect and report
22 The OpenBMC project currently has a [witherspoon-pfault-analysis][1] repository
38 1. The power supply application must detect, isolate, and report individual
47 moved from the `phosphor-dbus-monitor` to this application, depending on if
55 7. The power supply application must allow power supply hot-plug and concurrent
59 9. The power supply application must be able to detect how many power supplies
65 the application updating properties for a Minimum Ship Level ([MSL][3])
72 only known to be created and updated by the [ibm-cffps][4] device driver).
84 [phosphor-power][6] repository. The application would be written in C++17.
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| H A D | platform-init.md | 5 Created: 7-21-25
14 3. Initing a power rail dependent on the state of a plug detect pin.
33 (dc-scm)
37 Initially, a new repository would be created to house the platform-init for
43 meta-layer process that exists today.
45 Top level structure will be
50 given platform. At some point in the future, some level of detection _may_ be
67 2. A new service will be launched for platforms opting into platform-init.
71 - Does this proposal require a new repository? Yes Request for the repository is
73 - Who will be the initial maintainer(s) of this repository? Ed Tanous and
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| /openbmc/u-boot/doc/device-tree-bindings/gpio/ |
| H A D | gpio-pcf857x.txt | 1 * PCF857x-compatible I/O expanders
3 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
4 driven high by a pull-up current source or driven low to ground. This combines
5 the direction and output level into a single bit per line, which can't be read
14 - compatible: should be one of the following.
15 - "maxim,max7328": For the Maxim MAX7378
16 - "maxim,max7329": For the Maxim MAX7329
17 - "nxp,pca8574": For the NXP PCA8574
18 - "nxp,pca8575": For the NXP PCA8575
19 - "nxp,pca9670": For the NXP PCA9670
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| /openbmc/openbmc/poky/meta/recipes-connectivity/iw/iw/ |
| H A D | 0001-iw-version.sh-don-t-use-git-describe-for-versioning.patch | 3 It will detect top-level git repositories like the Angstrom setup-scripts and break.
5 Upstream-Status: Pending
7 Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
8 Signed-off-by: Maxin B. John <maxin.john@intel.com>
9 ---
10 diff -Naur iw-4.7-orig/version.sh iw-4.7/version.sh
11 --- iw-4.7-orig/version.sh 2016-05-31 12:52:46.000000000 +0300
12 +++ iw-4.7/version.sh 2016-06-01 11:21:58.307409060 +0300
13 @@ -15,27 +15,7 @@
17 -v=""
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| /openbmc/qemu/hw/core/ |
| H A D | resetcontainer.c | 7 * See the COPYING file in the top-level directory.
32 g_ptr_array_add(rc->children, obj); in resettable_container_add()
37 g_ptr_array_remove(rc->children, obj); in resettable_container_remove()
43 return &rc->reset_state; in resettable_container_get_state()
51 unsigned int len = rc->children->len; in resettable_container_child_foreach()
54 cb(g_ptr_array_index(rc->children, i), opaque, type); in resettable_container_child_foreach()
55 /* Detect callbacks trying to unregister themselves */ in resettable_container_child_foreach()
56 assert(len == rc->children->len); in resettable_container_child_foreach()
64 rc->children = g_ptr_array_new(); in resettable_container_init()
76 rc->get_state = resettable_container_get_state; in resettable_container_class_init()
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| /openbmc/qemu/docs/specs/ |
| H A D | pci-testdev.rst | 5 ``pci-testdev`` is a device used for testing low level IO.
8 Each of BAR 0+1 can be memory or IO. Guests must detect
14 .. code-block:: c
17 uint8_t test; /* write-only, starts a given test number */
19 * read-only, type and width of access for a given test.
24 uint32_t offset; /* read-only, offset in this BAR for a given test */
25 uint32_t data; /* read-only, data to use for a given test */
27 uint8_t name[]; /* for debugging. 0-terminated ASCII string. */
|
| /openbmc/u-boot/board/ti/panda/ |
| H A D | panda.c | 1 // SPDX-License-Identifier: GPL-2.0+
8 #include <asm/mach-types.h>
21 #include <asm/ehci-omap.h>
48 gd->bd->bi_arch_number = MACH_TYPE_OMAP4_PANDA; in board_init()
49 gd->bd->bi_boot_params = (0x80000000 + 0x100); /* boot param addr */ in board_init()
61 * Description: Detect if we are running on a panda revision A1-A6,
63 * the level of GPIOs and checking the processor revisions.
66 * GPIO171, GPIO101, GPIO182: 0 1 1 => A1-A5
81 writew((IEN | M3), (*ctrl)->control_padconf_core_base + UNIPRO_TX0); in get_board_revision()
82 writew((IEN | M3), (*ctrl)->control_padconf_core_base + FREF_CLK2_OUT); in get_board_revision()
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| /openbmc/qemu/linux-user/include/host/mips/ |
| H A D | host-signal.h | 2 * host-signal.h: signal info dependent on the host architecture
4 * Copyright (c) 2003-2005 Fabrice Bellard
8 * See the COPYING file in the top-level directory.
19 return uc->uc_mcontext.pc; in host_signal_pc()
24 uc->uc_mcontext.pc = pc; in host_signal_set_pc()
29 return &uc->uc_sigmask; in host_signal_mask()
40 /* Detect all store instructions at program counter. */ in host_signal_write()
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| /openbmc/u-boot/include/linux/ |
| H A D | serial_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
39 #define UART_IIR_BUSY 0x07 /* DesignWare APB Busy Detect */
116 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
126 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
135 #define UART_MSR_DCD 0x80 /* Data Carrier Detect */
160 #define UART_EFR_SCD 0x20 /* Special character detect */
178 #define UART_TI752_TLR 7 /* I/O: trigger level register */
222 * The Intel XScale on-chip UARTs define these bits
237 * Intel MID on-chip HSU (High Speed UART) defined bits
259 #define UART_RFL 0x03 /* Receiver FIFO level */
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| /openbmc/qemu/include/hw/mem/ |
| H A D | nvdimm.h | 2 * Non-Volatile Dual In-line Memory Module Virtualization Implementation
20 * See the COPYING file in the top-level directory.
26 #include "hw/mem/pc-dimm.h"
27 #include "hw/acpi/bios-linker-loader.h"
29 #include "hw/acpi/aml-build.h"
43 #define NVDIMM_LABEL_SIZE_PROP "label-size"
87 * The PPC64 - spapr requires each nvdimm device have a uuid.
108 #define NVDIMM_DSM_MEM_FILE "etc/acpi/nvdimm-mem"
121 * @dirty: It allows OSPM to detect change and restart read in
131 /* detect if NVDIMM support is enabled. */
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| /openbmc/qemu/hw/arm/ |
| H A D | strongarm.c | 2 * StrongARM SA-1100/SA-1110 emulation
4 * Copyright (C) 2011 Dmitry Eremin-Solenikov
11 * Copyright (c) 2003-2004 Fabrice Bellard
26 * Contributions after 2012-01-13 are licensed under the terms of the
32 #include "hw/qdev-properties.h"
33 #include "hw/qdev-properties-system.h"
37 #include "qemu/error-report.h"
39 #include "chardev/char-fe.h"
40 #include "chardev/char-serial.h"
48 #include "target/arm/cpu-qom.h"
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| /openbmc/openpower-proc-control/procedures/openfsi/ |
| H A D | scan.cpp | 8 * http://www.apache.org/licenses/LICENSE-2.0
19 #include <phosphor-logging/elog-errors.hpp>
20 #include <phosphor-logging/log.hpp>
33 constexpr auto masterScanPath = "/sys/class/fsi-master/fsi0/rescan";
34 constexpr auto hubScanPath = "/sys/class/fsi-master/fsi1/rescan";
35 constexpr auto masterCalloutPath = "/sys/class/fsi-master/fsi0/slave@00:00/raw";
41 * @param[in] path - the sysfs path to write a 1 to
71 // the master and hub scans. The only way we can detect something in scan()
83 log<level::ERR>("Failed to run the FSI master scan"); in scan()
94 log<level::ERR>("The FSI master scan did not create a hub scan file"); in scan()
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| /openbmc/qemu/linux-user/include/host/riscv/ |
| H A D | host-signal.h | 2 * host-signal.h: signal info dependent on the host architecture
4 * Copyright (c) 2003-2005 Fabrice Bellard
8 * See the COPYING file in the top-level directory.
19 return uc->uc_mcontext.__gregs[REG_PC]; in host_signal_pc()
24 uc->uc_mcontext.__gregs[REG_PC] = pc; in host_signal_set_pc()
29 return &uc->uc_sigmask; in host_signal_mask()
35 * Detect store by reading the instruction at the program counter. in host_signal_write()
42 /* 16-bit instructions */ in host_signal_write()
53 /* 32-bit instructions, major opcodes */ in host_signal_write()
56 case 0x27: /* store-fp */ in host_signal_write()
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| /openbmc/openbmc/meta-security/recipes-ids/suricata/files/ |
| H A D | suricata.yaml | 2 ---
13 # If you are using the CUDA pattern matcher (mpm-algo: ac-cuda), different rules
16 #max-pending-packets: 1024
18 # Runmode the engine should use. Please check --list-runmodes to get the available
27 # round-robin - Flows assigned to threads in a round robin fashion.
28 # active-packets - Flows assigned to threads that have the lowest number of
30 # hash - Flow alloted usihng the address hash. More of a random
33 #autofp-scheduler: active-packets
36 # it is a pure sniffing setup, set it to 'sniffer-only'.
38 # and 'sniffer-only' in IDS mode.
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