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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c2 * pxaregs - tool to display and modify PXA250's registers at runtime
4 * (c) Copyright 2002 by M&N Logistik-Lösungen Online GmbH
9 * Please send patches to h.schurig, working at mn-logistik.de
10 * - added fix from Bernhard Nemec
11 * - i2c registers from Stefan Eletzhofer
25 #include <linux/i2c-dev.h>
29 static int fd = -1;
85 { "PMCR", 0x40F00000, 0, 0xffffffff, 'x', "Power Manager Control Register (3-23)" },
88 { "PSSR", 0x40F00004, 0, 0xffffffff, 'x', "Power Manager Sleep Status Register (3-29)" },
95 { "PSPR", 0x40F00008, 0, 0xffffffff, 'x', "Power Manager Scratch Pad Register (3-30)" },
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dmvgpio.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Written-by: Ajay Bhargav <contact@8051projects.net>
20 u32 gplr; /* Pin Level Register - 0x0000 */
22 u32 gpdr; /* Pin Direction Register - 0x000C */
24 u32 gpsr; /* Pin Output Set Register - 0x0018 */
26 u32 gpcr; /* Pin Output Clear Register - 0x0024 */
28 u32 grer; /* Rising-Edge Detect Enable Register - 0x0030 */
30 u32 gfer; /* Falling-Edge Detect Enable Register - 0x003C */
32 u32 gedr; /* Edge Detect Status Register - 0x0048 */
34 u32 gsdr; /* Bitwise Set of GPIO Direction Register - 0x0054 */
[all …]
/openbmc/linux/include/linux/mfd/arizona/
H A Dpdata.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/mfd/arizona.h>
12 #include <linux/regulator/arizona-ldo1.h>
13 #include <linux/regulator/arizona-micsupp.h>
36 #define ARIZONA_GPN_FN_MASK 0x007F /* GPN_FN - [6:0] */
37 #define ARIZONA_GPN_FN_SHIFT 0 /* GPN_FN - [6:0] */
38 #define ARIZONA_GPN_FN_WIDTH 7 /* GPN_FN - [6:0] */
114 /** Use the headphone detect circuit to identify the accessory */
135 /** Mic detect ramp rate */
138 /** Mic detect sample rate */
[all …]
/openbmc/linux/drivers/irqchip/
H A Dirq-renesas-irqc.c1 // SPDX-License-Identifier: GPL-2.0
26 /* SYS-CPU vs. RT-CPU */
27 #define DETECT_STATUS 0x100 /* IRQn Detect Status Register */
28 #define MONITOR 0x104 /* IRQn Signal Level Monitor Register */
29 #define HLVL_STS 0x108 /* IRQn High Level Detect Status Register */
30 #define LLVL_STS 0x10c /* IRQn Low Level Detect Status Register */
31 #define S_R_EDGE_STS 0x110 /* IRQn Sync Rising Edge Detect Status Reg. */
32 #define S_F_EDGE_STS 0x114 /* IRQn Sync Falling Edge Detect Status Reg. */
33 #define A_R_EDGE_STS 0x118 /* IRQn Async Rising Edge Detect Status Reg. */
34 #define A_F_EDGE_STS 0x11c /* IRQn Async Falling Edge Detect Status Reg. */
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-class-led9 just be turned on for non-zero brightness settings.
23 Documentation/leds/leds-class-multicolor.rst.
30 Writing non-zero to this file while trigger is active changes the
40 Maximum brightness level for this LED, default is 255 (LED_FULL).
49 Last hardware set brightness level for this LED. Some LEDs
51 where this happens and the driver can detect this, will have
54 This file supports poll() to detect when the hardware changes
57 Reading this file will return the last brightness level set
73 their documentation see `sysfs-class-led-trigger-*`.
/openbmc/linux/drivers/gpio/
H A Dgpio-tangier.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <linux/pinctrl/pinconf-generic.h>
28 #include "gpio-tangier.h"
31 #define GPLR 0x004 /* Pin level r/o */
35 #define GRER 0x064 /* Rising edge detect */
36 #define GFER 0x07c /* Falling edge detect */
41 #define GLPR 0x318 /* Level input polarity */
44 * struct tng_gpio_context - Context to be saved during suspend-resume
45 * @level: Pin level
47 * @grer: Rising edge detect enable
[all …]
/openbmc/qemu/hw/gpio/
H A Dnrf51_gpio.c2 * nRF51 System-on-Chip general purpose input/output register definition
7 * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
10 * the COPYING file in the top-level directory.
23 * given the current configuration and logic level.
24 * It is not differentiated between standard and "high"(-power) drive modes.
26 static bool is_connected(uint32_t config, uint32_t level) in is_connected() argument
36 state = level != 0; in is_connected()
39 state = level == 0; in is_connected()
56 return -1; in pull_value()
60 bool connected, bool level) in update_output_irq() argument
[all …]
/openbmc/linux/drivers/gpu/drm/
H A Ddrm_privacy_screen_x86.c1 // SPDX-License-Identifier: MIT
17 bool (*detect)(void); member
21 static acpi_status __init acpi_set_handle(acpi_handle handle, u32 level, in acpi_set_handle() argument
39 /* Get embedded-controller handle */ in detect_thinkpad_privacy_screen()
44 /* And call the privacy-screen get-status method */ in detect_thinkpad_privacy_screen()
56 return acpi_dev_present("GOOG0010", NULL, -1); in detect_chromeos_privacy_screen()
66 .provider = "privacy_screen-thinkpad_acpi",
68 .detect = detect_thinkpad_privacy_screen,
76 .provider = "privacy_screen-GOOG0010:00",
78 .detect = detect_chromeos_privacy_screen,
[all …]
/openbmc/phosphor-power/phosphor-regulators/src/
H A Dphase_fault_detection.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
41 * "de-glitching" to ignore transient hardware problems.
59 // Execute the actions to detect phase faults in execute()
75 "Unable to detect phase faults in regulator " + in execute()
81 Entry::Level::Warning, services, in execute()
132 Entry::Level severity = (faultType == PhaseFaultType::n) in logPhaseFault()
133 ? Entry::Level::Warning in logPhaseFault()
134 : Entry::Level::Informational; in logPhaseFault()
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dqcom,pdc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
16 interrupt controller that can be used to help detect edge low interrupts as
17 well detect interrupts when the GIC is non-operational.
19 GIC is parent interrupt controller at the highest level. Platform interrupt
28 - enum:
[all …]
/openbmc/qemu/include/hw/gpio/
H A Dnrf51_gpio.h2 * nRF51 System-on-Chip general purpose input/output register definition
6 * + Unnamed GPIO inputs 0-31: Set tri-state input level for GPIO pin.
7 * Level -1: Externally Disconnected/Floating; Pull-up/down will be regarded
8 * Level 0: Input externally driven LOW
9 * Level 1: Input externally driven HIGH
10 * + Unnamed GPIO outputs 0-31:
11 * Level -1: Disconnected/Floating
12 * Level 0: Driven LOW
13 * Level 1: Driven HIGH
16 * + The nRF51 GPIO output driver supports two modes, standard and high-current
[all …]
/openbmc/phosphor-power/phosphor-regulators/docs/config_file/
H A Dphase_fault_detection.md5 Specifies how to detect and log redundant phase faults in a voltage regulator.
14 The technique used to detect a phase fault varies depending on the regulator
20 This provides "de-glitching" to ignore transient hardware problems.
24 - Use the [if](if.md) action to implement the high level behavior "if a fault is
26 - Detecting the fault
27 - Use a comparison action like [i2c_compare_bit](i2c_compare_bit.md) to detect
29 - Logging the error
30 - Use the [i2c_capture_bytes](i2c_capture_bytes.md) action to capture
32 - Use the [log_phase_fault](log_phase_fault.md) action to log a phase fault
38 - Use the "rule_id" property to specify a standard rule to run.
[all …]
H A Drule.md11 - Actions that set the output voltage of a regulator rail
12 - Actions that read all the sensors of a regulator rail
13 - Actions that detect down-level hardware using version registers
14 - Actions that detect phase faults
19 …:------- | :------: | :---------------------------- | :-------------------------------------------…
21 … | Unique ID for this rule. Can only contain letters (A-Z, a-z), numbers (0-9), and und…
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dpsci.S1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <asm/arch-armv7/generictimer.h>
96 @ Affinity level 2 - Cluster: only one cluster in LS1021xa.
100 @ Affinity level 1 - Processors: should be in 0xf00 format.
105 @ Affinity level 0 - CPU: only 0, 1 are valid in LS1021xa.
135 @ Detect target CPU state
209 @ Verify Affinity level
224 @ Detect target CPU state
/openbmc/linux/drivers/char/ipmi/
H A Dipmi_si_sm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * State machine interface for low-level IPMI system management
8 * BT interface) and the actual low-level state machine.
61 * return -2 if the state machine is not idle, -1 if the size
70 * -1 if the buffer is too small, zero if no transaction is
78 * receiving an interrupt (for a interrupt-driven interface).
87 * Attempt to detect an SMI. Returns 0 on success or nonzero
90 int (*detect)(struct si_sm_data *smi); member
/openbmc/linux/drivers/md/
H A Dmd-autodetect.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/raid/detect.h>
33 int level; member
41 * Parse the command-line parameters given our kernel, but do not
43 * md_setup_drive after the low-level disk drivers have initialised.
49 * instead of just one. -- KTK
50 * 18May2000: Added support for persistent-superblock arrays:
51 * md=n,0,factor,fault,device-list uses RAID0 for device n
52 * md=n,-1,factor,fault,device-list uses LINEAR for device n
53 * md=n,device-list reads a RAID superblock from the devices
[all …]
/openbmc/linux/drivers/accel/ivpu/
H A Dvpu_boot_api.h1 /* SPDX-License-Identifier: MIT */
3 * Copyright (C) 2020-2023 Intel Corporation
12 * fw_bin_header->api_version[VPU_BOOT_API_VER_ID] = (VPU_BOOT_API_VER_MAJOR << 16) |
39 /* ------------ FW API version information end ---------------------*/
156 /* Clock frequencies: 0x20 - 0xFF */
161 /* Memory regions: 0x100 - 0x1FF */
181 /* IRQ re-direct numbers: 0x200 - 0x2FF */
184 /* ARM -> VPU doorbell interrupt. ARM is notifying VPU of async command or compute job. */
186 /* VPU -> ARM job done interrupt. VPU is notifying ARM of compute job completion. */
188 /* VPU -> ARM IRQ line to use to request MMU update. */
[all …]
/openbmc/linux/include/uapi/linux/
H A Dmdio.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 * Copyright 2006-2009 Solarflare Communications Inc.
25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */
41 #define MDIO_PMA_RXDET 10 /* 10G PMA/PMD receive signal detect */
58 /* Media-dependent registers. */
59 #define MDIO_PMA_10GBT_SWAPPOL 130 /* 10GBASE-T pair swap & polarity */
60 #define MDIO_PMA_10GBT_TXPWR 131 /* 10GBASE-T TX power control */
61 #define MDIO_PMA_10GBT_SNR 133 /* 10GBASE-T SNR margin, lane A.
62 * Lanes B-D are numbered 134-136. */
63 #define MDIO_PMA_10GBR_FSRT_CSR 147 /* 10GBASE-R fast retrain status and control */
[all …]
/openbmc/qemu/scripts/qemugdb/
H A Dmtree.py10 # later. See the COPYING file in the top-level directory.
12 # 'qemu mtree' -- display the memory hierarchy
22 QEMU can be built with native Int128 support so we need to detect
50 def print_item(self, ptr, offset = gdb.Value(0), level = 0): argument
63 gdb.write('%s%016x-%016x %s%s (@ %s)\n'
64 % (' ' * level,
66 int(addr + (size - 1)),
74 (' ' * level,
82 level += 1
84 self.print_item(subregion, addr, level)
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dfsl,imx8mq-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8mq-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Jun <jun.li@nxp.com>
15 - fsl,imx8mq-usb-phy
16 - fsl,imx8mp-usb-phy
21 "#phy-cells":
27 clock-names:
29 - const: phy
[all …]
H A Dqcom,usb-snps-femto-v2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Synopsys Femto High-Speed USB PHY V2
10 - Wesley Cheng <quic_wcheng@quicinc.com>
13 Qualcomm High-Speed USB PHY
18 - items:
19 - enum:
20 - qcom,sa8775p-usb-hs-phy
[all …]
/openbmc/linux/tools/testing/selftests/futex/functional/
H A Dfutex_requeue_pi_mismatched_ops.c1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * 3. The kernel must detect the mismatch and return -EINVAL.
15 * 2009-Nov-9: Initial version by Darren Hart <dvhart@linux.intel.com>
29 #define TEST_NAME "futex-requeue-pi-mismatched-ops"
38 printf(" -c Use color\n"); in usage()
39 printf(" -h Display this help message\n"); in usage()
40 printf(" -v L Verbosity level: %d=QUIET %d=CRITICAL %d=INFO\n", in usage()
48 child_ret = -errno; in blocking_child()
60 while ((c = getopt(argc, argv, "chv:")) != -1) { in main()
79 ksft_print_msg("%s: Detect mismatched requeue_pi operations\n", in main()
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_aux_backlight.c72 # define INTEL_EDP_HDR_TCON_TONE_MAPPING_ENABLE BIT(2) /* Pre-TGL+ */
79 #define INTEL_EDP_HDR_CONTENT_LUMINANCE 0x346 /* Pre-TGL+ */
101 INTEL_DP_AUX_BACKLIGHT_AUTO = -1,
117 struct drm_i915_private *i915 = to_i915(connector->base.dev); in intel_dp_aux_supports_hdr_backlight()
118 struct intel_dp *intel_dp = enc_to_intel_dp(connector->encoder); in intel_dp_aux_supports_hdr_backlight()
119 struct drm_dp_aux *aux = &intel_dp->aux; in intel_dp_aux_supports_hdr_backlight()
120 struct intel_panel *panel = &connector->panel; in intel_dp_aux_supports_hdr_backlight()
133 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] Detected %s HDR backlight interface version %d\n", in intel_dp_aux_supports_hdr_backlight()
134 connector->base.base.id, connector->base.name, in intel_dp_aux_supports_hdr_backlight()
142 * runtime detect used range for nits based control. For now in intel_dp_aux_supports_hdr_backlight()
[all …]
/openbmc/linux/include/media/
H A Dcec-pin.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
21 * @enable_irq: optional, enable the interrupt to detect pin voltage changes.
30 * @received: optional. High-level CEC message callback. Allows the driver
47 /* High-level CEC message callback */
52 * cec_pin_changed() - update pin state from interrupt
63 * cec_pin_allocate_adapter() - allocate a pin-based cec adapter
65 * @pin_ops: low-level pin operations
[all …]
/openbmc/linux/include/pcmcia/
H A Dsoc_common.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 unsigned detect: 1, member
23 * This structure encapsulates per-socket state which we might need to
30 * Info from low level handler
59 #define SOC_STAT_CD 0 /* Card detect */
97 * Enable card status IRQs on (re-)initialisation. This can

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