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/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dpca963x.txt4 - compatible : should be : "nxp,pca9632", "nxp,pca9633", "nxp,pca9634" or "nxp,pca9635"
7 - nxp,totem-pole : use totem pole (push-pull) instead of open-drain (pca9632 defaults
8 to open-drain, newer chips to totem pole)
9 - nxp,hw-blink : use hardware blinking instead of software blinking
10 - nxp,period-scale : In some configurations, the chip blinks faster than expected.
13 - nxp,inverted-out: invert the polarity of the generated PWM
15 Each led is represented as a sub-node of the nxp,pca963x device.
17 LED sub-node properties:
18 - label : (optional) see Documentation/devicetree/bindings/leds/common.txt
19 - reg : number of LED line (could be from 0 to 3 in pca9632 or pca9633,
[all …]
H A Dleds-aw2013.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-aw2013.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AWINIC AW2013 3-channel LED Driver
10 - Nikita Travkin <nikitos.tr@gmail.com>
13 The AW2013 is a 3-channel LED driver with I2C interface. It can control
14 LED brightness with PWM output.
25 description: Open-drain, low active interrupt pin "INTN".
26 Used to report completion of operations (power up, LED breath effects).
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/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dnxp,pca9685-pwm.txt1 NXP PCA9685 16-channel 12-bit PWM LED controller
5 - compatible: "nxp,pca9685-pwm"
6 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
12 - invert (bool): boolean to enable inverted logic
13 - open-drain (bool): boolean to configure outputs with open-drain structure;
14 if omitted use totem-pole structure
22 compatible = "nxp,pca9685-pwm";
23 #pwm-cells = <2>;
26 open-drain;
/openbmc/linux/Documentation/devicetree/bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
20 mdio-bus configurations are not supported by the hardware.
27 - enum:
28 - qca,qca8327
[all …]
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48 - Output values are writable (high=1, low=0). Some chips also have
50 value might be driven, supporting "wire-OR" and similar schemes for the
[all …]
H A Dboard.rst7 Note that it only applies to the new descriptor-based interface. For a
8 description of the deprecated integer-based GPIO interface please refer to
20 -----------
26 <function>-gpios, where <function> is the function the driver will request
32 led-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>, /* red */
36 power-gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
39 Properties named <function>-gpio are also considered valid and old bindings use
44 "led" function, and GPIO 1 as the "power" GPIO::
48 red = gpiod_get_index(dev, "led", 0, GPIOD_OUT_HIGH);
49 green = gpiod_get_index(dev, "led", 1, GPIOD_OUT_HIGH);
[all …]
H A Dlegacy.rst13 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
21 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
22 non-dedicated pin can be configured as a GPIO; and most chips have at least
27 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
32 - Output values are writable (high=1, low=0). Some chips also have
34 value might be driven ... supporting "wire-OR" and similar schemes
35 for the other value (notably, "open drain" signaling).
37 - Input values are likewise readable (1, 0). Some chips support readback
38 of pins configured as "output", which is very useful in such "wire-OR"
40 input de-glitch/debounce logic, sometimes with software controls.
[all …]
H A Dconsumer.rst6 it describes the new descriptor-based interface. For a description of the
7 deprecated integer-based GPIO interface please refer to legacy.rst.
23 - Simple compile coverage with e.g. COMPILE_TEST - it does not matter that
27 - Truly optional GPIOLIB support - where the driver does not really make use
28 of the GPIOs on certain compile-time configurations for certain systems, but
29 will use it under other compile-time configurations. In this case the
33 All the functions that work with the descriptor-based GPIO interface are
43 With the descriptor-based interface, GPIOs are identified with an opaque,
44 non-forgeable handler that must be obtained through a call to one of the
52 If a function is implemented by using several GPIOs together (e.g. a simple LED
[all …]
H A Ddriver.rst21 of a general purpose I/O. On the other hand a LED driver line may be used as a
26 between 0 and n-1, n being the number of GPIOs managed by the chip.
29 example if a system uses a memory-mapped set of I/O-registers where 32 GPIO
30 lines are handled by one bit per line in a 32-bit register, it makes sense to
44 So for example one platform could use global numbers 32-159 for GPIOs, with a
46 global numbers 0..63 with one set of GPIO controllers, 64-79 with another type
47 of GPIO controller, and on one particular board 80-95 with an FPGA. The legacy
49 2000-2063 to identify GPIO lines in a bank of I2C GPIO expanders.
60 - methods to establish GPIO line direction
61 - methods used to access GPIO line values
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91-kizbox3-hs.dts1 // SPDX-License-Identifier: GPL-2.0
3 * at91-kizbox3-hs.dts - Device Tree file for Overkiz KIZBOX3-HS board
11 /dts-v1/;
12 #include "at91-kizbox3_common.dtsi"
15 model = "Overkiz KIZBOX3-HS";
16 compatible = "overkiz,kizbox3-hs", "atmel,sama5d2", "atmel,sama5";
18 led-controller-1 {
21 led-1 {
25 led-2 {
29 led-3 {
[all …]
H A Dat91-foxg20.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91-foxg20.dts - Device Tree file for Acme Systems FoxG20 board
9 /dts-v1/;
26 clock-frequency = <32768>;
30 clock-frequency = <18432000>;
38 compatible = "atmel,tcb-timer";
43 compatible = "atmel,tcb-timer";
49 atmel,vbus-gpio = <&pioC 6 GPIO_ACTIVE_HIGH>;
54 pinctrl-0 = <
58 pinctrl-names = "default";
[all …]
H A Dat91sam9x5cm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
16 clock-frequency = <32768>;
20 clock-frequency = <12000000>;
28 compatible = "atmel,tcb-timer";
33 compatible = "atmel,tcb-timer";
40 pinctrl_1wire_cm: 1wire_cm-0 {
41 …<AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
52 pinctrl-0 = <&pinctrl_ebi_addr_nand
54 pinctrl-names = "default";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-palmas.txt4 the configuration for Pull UP/DOWN, open drain etc.
7 - compatible: It must be one of following:
8 - "ti,palmas-pinctrl" for Palma series of the pincontrol.
9 - "ti,tps65913-pinctrl" for Palma series device TPS65913.
10 - "ti,tps80036-pinctrl" for Palma series device TPS80036.
12 Please refer to pinctrl-bindings.txt in this directory for details of the
19 those pin(s), and various pin configuration parameters, such as pull-up,
20 open drain.
32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
35 - ti,palmas-enable-dvfs2: Enable DVFS2. Configure pins for DVFS2 mode.
[all …]
H A Dnvidia,tegra234-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - description: pinmux registers
19 "^pinmux(-[a-z0-9-]+)?$":
24 $ref: nvidia,tegra-pinmux-common.yaml
27 # for all chip generations. In this case, however, we want the per-SoC
[all …]
H A Dlantiq,pinctrl-falcon.txt4 - compatible: "lantiq,pinctrl-falcon"
5 - reg: Should contain the physical address and length of the gpio/pinmux
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 pull-up and open-drain
31 Required subnode-properties:
32 - lantiq,groups : An array of strings. Each string contains the name of a group.
34 - lantiq,function: A string containing the name of the function to mux to the
44 rst, ntr, mdio, led, asc, spi, i2c, jtag, slic, pcm
49 Required subnode-properties:
50 - lantiq,pins : An array of strings. Each string contains the name of a pin.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Drohm,bd71828-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71828GW is a single-chip power management IC for battery-powered portable
15 single-cell linear charger. Also included is a Coulomb counter, a real-time
30 gpio-controller: true
32 "#gpio-cells":
41 "#clock-cells":
[all …]
H A Drohm,bd71815-pmic.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71815-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71815AGW is a single-chip power management ICs for battery-powered
15 for LED and a 500 mA single-cell linear charger. Also included is a Coulomb
16 counter, a real-time clock (RTC), and a 32.768 kHz clock gate and two GPOs.
30 gpio-controller: true
32 "#gpio-cells":
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dled.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2010 Realtek Corporation.*/
7 #include "led.h"
83 if (rtlpriv->ledctl.led_opendrain) { in rtl8821ae_sw_led_off()
129 /*Open-drain arrangement for controlling the LED*/ in rtl8812ae_sw_led_off()
130 if (rtlpriv->ledctl.led_opendrain) { in rtl8812ae_sw_led_off()
136 /*Open-drain arrangement*/ in rtl8812ae_sw_led_off()
149 enum rtl_led_pin pin0 = rtlpriv->ledctl.sw_led0; in _rtl8821ae_sw_led_control()
156 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) in _rtl8821ae_sw_led_control()
162 if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) in _rtl8821ae_sw_led_control()
[all …]
/openbmc/linux/drivers/leds/
H A Dleds-pca963x.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Peter Meerwald <p.meerwald@bct-electronic.com>
9 * Based on leds-pca955x.c
11 * LED driver for the PCA9633 I2C LED driver (7-bit slave address 0x62)
12 * LED driver for the PCA9634/5 I2C LED driver (7-bit slave address set by hw.)
18 * in identical fashion. The delay_on/delay_off values of the last LED
22 * or by adding the 'nxp,hw-blink' property to the DTS.
36 /* LED select registers determine the source that drives LED outputs */
37 #define PCA963X_LED_OFF 0x0 /* LED driver off */
38 #define PCA963X_LED_ON 0x1 /* LED driver on */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dmicrochip,cap11xx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The Microchip CAP1xxx Family of RightTouchTM multiple-channel capacitive
11 touch controllers and LED drivers. The device communication via I2C only.
14 - Rob Herring <robh@kernel.org>
19 - microchip,cap1106
20 - microchip,cap1126
21 - microchip,cap1188
22 - microchip,cap1203
[all …]
/openbmc/u-boot/board/keymile/kmp204x/
H A Dkmp204x.c1 // SPDX-License-Identifier: GPL-2.0+
37 * For I2C only the low state is activly driven and high state is pulled-up
39 * -> as an active output to drive a low state
40 * -> as an open-drain input to have a pulled-up high state
51 /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ in i2c_deblock_gpio_cfg()
94 setbits_be32(&gur->ddrclkdr, 0x001f000f); in board_early_init_f()
97 if ((gur->rstrqsr1 & (RSTRQSR1_WDT_RR | RSTRQSR1_SW_RR)) == in board_early_init_f()
103 setbits_be32(&gur->rstrqsr1, RSTRQSR1_WDT_RR | RSTRQSR1_SW_RR); in board_early_init_f()
105 /* set the BFTIC's prstcfg to reset at power-up and unit reset only */ in board_early_init_f()
110 /* set the ZL30138's prstcfg to reset at power-up only */ in board_early_init_f()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dat91sam9x5cm.dtsi2 * at91sam9x5cm.dtsi - Device Tree Include file for AT91SAM9x5 CPU Module
17 clock-frequency = <32768>;
21 clock-frequency = <12000000>;
29 pinctrl_1wire_cm: 1wire_cm-0 {
30 …<AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
41 nand-bus-width = <8>;
42 nand-ecc-mode = "hw";
43 atmel,has-pmecc; /* Enable PMECC */
44 atmel,pmecc-cap = <2>;
45 atmel,pmecc-sector-size = <512>;
[all …]
/openbmc/linux/drivers/pinctrl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
77 found in Documentation/devicetree/bindings/pinctrl/axis,artpec6-pinctrl.txt
86 functionality. This driver supports the pinmux, push-pull and
87 open drain configuration for the GPIO pins of AS3722 devices. It also
117 tristate "X-Powers AXP209 PMIC pinctrl and GPIO Support"
150 called pinctrl-cy8c95x0.
153 tristate "TI DA850/OMAP-L138/AM18XX pull-up and pull-down groups"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
39 such as if the consumer desire the line to be active low (inverted) or open
40 drain. This is the recommended practice.
[all …]
/openbmc/linux/arch/powerpc/boot/dts/
H A Dwii.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2008-2009 The GameCube Linux Team
10 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
15 * This is commented-out for now.
25 #address-cells = <1>;
26 #size-cells = <1>;
29 bootargs = "root=/dev/mmcblk0p2 rootwait udbg-immortal";
34 reg = <0x00000000 0x01800000 /* MEM1 24MB 1T-SRAM */
[all …]

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