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/openbmc/linux/drivers/staging/fbtft/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
3 tristate "Support for small TFT LCD display modules"
15 tristate "FB driver for the AGM1264K-FL LCD display"
18 Framebuffer support for the AGM1264K-FL LCD display (two Samsung KS0108 compatible chips)
21 tristate "FB driver for the BD663474 LCD Controller"
27 tristate "FB driver for the HX8340BN LCD Controller"
33 tristate "FB driver for the HX8347D LCD Controller"
39 tristate "FB driver for the HX8353D LCD Controller"
45 tristate "FB driver for the HX8357D LCD Controller"
51 tristate "FB driver for the ILI9163 LCD Controller"
[all …]
/openbmc/u-boot/arch/arm/mach-sunxi/
H A DKconfig4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM64
12 Select this dram controller driver for Sun4/5/7i platforms,
18 Select this dram controller driver for Sun6i platforms,
24 Select this dram controller driver for Sun8i platforms,
30 Select this dram controller driver for Sun8i platforms,
36 Select this dram controller driver for Sun8i platforms,
42 Select this dram controller driver for Sun9i platforms,
48 Select this dram controller driver for some sun50i platforms,
52 bool "Allwinner sun6i internal P2WI controller"
55 P2WI (Push/Pull 2 Wire Interface) controller embedded in some sunxi
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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dingenic,lcd.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/ingenic,lcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs LCD controller
10 - Paul Cercueil <paul@crapouillou.net>
14 pattern: "^lcd-controller@[0-9a-f]+$"
18 - ingenic,jz4740-lcd
19 - ingenic,jz4725b-lcd
20 - ingenic,jz4760-lcd
[all …]
H A Dallwinner,sun4i-a10-tcon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timings Controller (TCON)
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 The TCON acts as a timing controller for RGB, LVDS and TV
18 "#clock-cells":
23 - const: allwinner,sun4i-a10-tcon
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H A Dmarvell,pxa2xx-lcdc.txt1 PXA LCD Controller
2 ------------------
5 - compatible : one of these
6 "marvell,pxa2xx-lcdc",
7 "marvell,pxa270-lcdc",
8 "marvell,pxa300-lcdc"
9 - reg : should contain 1 register range (address and length).
10 - interrupts : framebuffer controller interrupt.
11 - clocks: phandle to input clocks
14 - lcd-supply: A phandle to a power regulator that controls the LCD voltage.
[all …]
H A Datmel,lcdc.txt2 -----------------------------------------------------
5 - compatible :
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
12 - reg : Should contain 1 register ranges(address and length).
15 - interrupts : framebuffer controller interrupt
[all …]
H A Dintel,keembay-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Keem Bay display controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-display
19 - description: LCD registers range
21 reg-names:
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/openbmc/linux/drivers/gpu/drm/panel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 tristate "ABT Y030XX067A 320x480 LCD panel"
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
46 as found in the YLM RS-97 handheld gaming console.
49 tristate "Boe BF060Y8M-AJ0 panel"
54 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
66 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
68 the host and has a built-in LED backlight.
94 This driver supports LVDS panels that don't require device-specific
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/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dolimex,lcd-olinuxino.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/olimex,lcd-olinuxino.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Olimex Ltd. LCD-OLinuXino bridge panel.
10 - Stefan Mavrodiev <stefan@olimex.com>
13 This device can be used as bridge between a host controller and LCD panels.
15 - LCD-OLinuXino-4.3TS
16 - LCD-OLinuXino-5
17 - LCD-OLinuXino-7
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/openbmc/linux/Documentation/admin-guide/auxdisplay/
H A Dks0108.rst2 ks0108 LCD Controller Driver Documentation
7 :Date: 2006-10-27
19 ---------------------
21 This driver supports the ks0108 LCD controller.
25 ---------------------
28 :Device Name: KS0108 LCD Controller
30 :Webpage: -
31 :Device Webpage: -
32 :Type: LCD Controller (Liquid Crystal Display Controller)
43 ---------
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/openbmc/linux/drivers/video/backlight/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Backlight & LCD drivers configuration
6 menu "Backlight & LCD device support"
9 # LCD
12 tristate "Lowlevel LCD controls"
14 This framework adds support for low-level control of LCD.
15 Some framebuffer devices connect to platform-specific LCD modules
16 in order to have a platform-specific way to control the flat panel
17 (contrast and applying power to the LCD (not to the backlight!)).
19 To have support for your specific LCD panel you will have to
[all …]
H A Dhx8357.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for the Himax HX-8357 LCD Controller
9 #include <linux/lcd.h>
217 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_spi_write_then_read() local
232 return -ENOMEM; in hx8357_spi_write_then_read()
253 ret = spi_sync(lcd->spi, &msg); in hx8357_spi_write_then_read()
255 dev_err(&lcdev->dev, "Couldn't send SPI data\n"); in hx8357_spi_write_then_read()
290 * The controller needs 120ms when entering in sleep mode before we can in hx8357_enter_standby()
307 * The controller needs 120ms when exiting from sleep mode before we in hx8357_exit_standby()
321 struct hx8357_data *lcd = lcd_get_data(lcdev); in hx8357_lcd_reset() local
[all …]
/openbmc/linux/Documentation/devicetree/bindings/auxdisplay/
H A Dhit,hd44780.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface.
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dpxa3xx-regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * LCD Controller Registers and Bits Definitions
8 #define LCCR0 (0x000) /* LCD Controller Control Register 0 */
9 #define LCCR1 (0x004) /* LCD Controller Control Register 1 */
10 #define LCCR2 (0x008) /* LCD Controller Control Register 2 */
11 #define LCCR3 (0x00C) /* LCD Controller Control Register 3 */
12 #define LCCR4 (0x010) /* LCD Controller Control Register 4 */
13 #define LCCR5 (0x014) /* LCD Controller Control Register 5 */
14 #define LCSR (0x038) /* LCD Controller Status Register 0 */
15 #define LCSR1 (0x034) /* LCD Controller Status Register 1 */
[all …]
H A Dsa1100fb.h3 * -- StrongARM 1100 LCD Controller Frame Buffer Device
15 #define LCCR0 0x0000 /* LCD Control Reg. 0 */
16 #define LCSR 0x0004 /* LCD Status Reg. */
17 #define DBAR1 0x0010 /* LCD DMA Base Address Reg. channel 1 */
18 #define DCAR1 0x0014 /* LCD DMA Current Address Reg. channel 1 */
19 #define DBAR2 0x0018 /* LCD DMA Base Address Reg. channel 2 */
20 #define DCAR2 0x001C /* LCD DMA Current Address Reg. channel 2 */
21 #define LCCR1 0x0020 /* LCD Control Reg. 1 */
22 #define LCCR2 0x0024 /* LCD Control Reg. 2 */
23 #define LCCR3 0x0028 /* LCD Control Reg. 3 */
[all …]
H A Dau1200fb.c3 * Au1200 LCD Driver.
5 * Copyright 2004-2005 AMD
9 * linux/drivers/video/skeletonfb.c -- Skeleton for a frame buffer device
44 #include <linux/dma-mapping.h>
48 #include <asm/mach-au1x00/au1000.h>
49 #include <asm/mach-au1x00/au1200fb.h> /* platform_data */
53 #define DRIVER_DESC "LCD controller driver for AU1200 processors"
146 /* Private, per-framebuffer management information (independent of the panel itself) */
160 /* LCD controller restrictions */
179 static struct au1200_lcd *lcd = (struct au1200_lcd *) AU1200_LCD_ADDR; variable
[all …]
/openbmc/linux/drivers/auxdisplay/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 # see Documentation/kbuild/kconfig-language.rst.
20 tristate "Character LCD core support" if COMPILE_TEST
22 This is the base system for character-based LCD displays.
25 This is some character LCD core interface that multiple drivers can
31 This is the core support for single-line character displays, to be
35 tristate "Common functions for HD44780 (and compatibles) LCD displays" if COMPILE_TEST
45 tristate "HD44780 Character LCD support"
49 Enable support for Character LCDs using a HD44780 controller.
50 The LCD is accessible through the /dev/lcd char device (10, 156).
[all …]
H A Darm-charlcd.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the on-board character LCD found on some ARM reference boards
4 * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
21 #define DRIVERNAME "arm-charlcd"
57 * struct charlcd - Private data structure
59 * @phybase: the offset to the controller in physical memory
61 * @virtbase: the offset to the controller in virtual memory
63 * @complete: completion structure for the last LCD command
78 struct charlcd *lcd = data; in charlcd_interrupt() local
81 status = readl(lcd->virtbase + CHAR_STAT) & 0x01; in charlcd_interrupt()
[all …]
/openbmc/linux/drivers/video/fbdev/omap/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
11 bool "External LCD controller support"
15 external LCD controller connected to the SoSSI/RFBI interface.
18 bool "Epson HWA742 LCD controller support"
22 Epson HWA742 LCD controller.
28 Say Y here, if your user-space applications are capable of
34 bool "MIPI DBI-C/DCS compatible LCD support"
38 the Mobile Industry Processor Interface DBI-C/DCS
/openbmc/linux/Documentation/devicetree/bindings/display/armada/
H A Dmarvell,dove-lcd.txt4 - compatible: value should be "marvell,dove-lcd".
5 - reg: base address and size of the LCD controller
6 - interrupts: single interrupt number for the LCD controller
7 - port: video output port with endpoints, as described by graph.txt
11 - clocks: as described by clock-bindings.txt
12 - clock-names: as described by clock-bindings.txt
13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
[all …]
/openbmc/linux/drivers/gpu/drm/mxsfb/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
8 tristate "i.MX (e)LCDIF LCD controller"
18 Choose this option if you have an LCDIF or eLCDIF LCD controller.
25 tristate "i.MX LCDIFv3 LCD controller"
35 Choose this option if you have an LCDIFv3 LCD controller.
39 If M is selected the module will be called imx-lcdif.
/openbmc/u-boot/include/
H A Dpxa_lcd.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * pxa_lcd.h - PXA LCD Controller structures
13 * PXA LCD DMA descriptor
23 * PXA LCD info
45 * LCD controller stucture for PXA CPU
54 /* LCD configuration register */
61 u_char vl_lbw; /* LCD Bus width, 0 = 4, 1 = 8 */
62 u_char vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */
76 /* PXA LCD controller params */
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9x5_lcd.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * at91sam9x5_lcd.dtsi - Device Tree Include file for AT91SAM9x5 SoC with an
4 * LCD controller.
9 #include <dt-bindings/pinctrl/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
16 compatible = "atmel,at91sam9x5-hlcdc";
20 clock-names = "periph_clk","sys_clk", "slow_clk";
23 hlcdc-display-controller {
24 compatible = "atmel,hlcdc-display-controller";
25 #address-cells = <1>;
[all …]
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dmipi_dsim.h1 /* SPDX-License-Identifier: GPL-2.0+ */
14 #include <lcd.h>
62 /* MIPI DSI Processor-to-Peripheral transaction types */
111 * struct mipi_dsim_config - interface for configuring mipi-dsi controller.
139 * in Non-burst mode, RGB data area is filled with RGB data and NULL
154 * BTA requests to D-PHY automatically. this counter value specifies
162 * - RxValid specifies Rx data valid indicator.
163 * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
164 * - RxValid and RxLpdt specifies signal from D-PHY.
186 * -------------------------------------------
[all …]
/openbmc/linux/Documentation/fb/
H A Dsa1100fb.rst8 This is a driver for a graphic framebuffer for the SA-1100 LCD
9 controller.
19 controller. The bits per pixel (bpp) value should be 4, 8, 12, or
20 16. LCCR values are display-specific and should be computed as
21 documented in the SA-1100 Developer's Manual, Section 11.7. Dual-panel
26 (controlling backlights, powering on the LCD, etc.), the command line
35 lccr0:<value> Configure LCD control register 0 (11.7.3)
36 lccr1:<value> Configure LCD control register 1 (11.7.4)
37 lccr2:<value> Configure LCD control register 2 (11.7.5)
38 lccr3:<value> Configure LCD control register 3 (11.7.6)

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