xref: /openbmc/u-boot/include/pxa_lcd.h (revision e8f80a5a)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2baaa7dd7SNikita Kiryanov /*
3baaa7dd7SNikita Kiryanov  * pxa_lcd.h - PXA LCD Controller structures
4baaa7dd7SNikita Kiryanov  *
5baaa7dd7SNikita Kiryanov  * (C) Copyright 2001
6baaa7dd7SNikita Kiryanov  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7baaa7dd7SNikita Kiryanov  */
8baaa7dd7SNikita Kiryanov 
9baaa7dd7SNikita Kiryanov #ifndef _PXA_LCD_H_
10baaa7dd7SNikita Kiryanov #define _PXA_LCD_H_
11baaa7dd7SNikita Kiryanov 
12baaa7dd7SNikita Kiryanov /*
13baaa7dd7SNikita Kiryanov  * PXA LCD DMA descriptor
14baaa7dd7SNikita Kiryanov  */
15baaa7dd7SNikita Kiryanov struct pxafb_dma_descriptor {
16baaa7dd7SNikita Kiryanov 	u_long	fdadr;		/* Frame descriptor address register */
17baaa7dd7SNikita Kiryanov 	u_long	fsadr;		/* Frame source address register */
18baaa7dd7SNikita Kiryanov 	u_long	fidr;		/* Frame ID register */
19baaa7dd7SNikita Kiryanov 	u_long	ldcmd;		/* Command register */
20baaa7dd7SNikita Kiryanov };
21baaa7dd7SNikita Kiryanov 
22baaa7dd7SNikita Kiryanov /*
23baaa7dd7SNikita Kiryanov  * PXA LCD info
24baaa7dd7SNikita Kiryanov  */
25baaa7dd7SNikita Kiryanov struct pxafb_info {
26baaa7dd7SNikita Kiryanov 	/* Misc registers */
27baaa7dd7SNikita Kiryanov 	u_long	reg_lccr3;
28baaa7dd7SNikita Kiryanov 	u_long	reg_lccr2;
29baaa7dd7SNikita Kiryanov 	u_long	reg_lccr1;
30baaa7dd7SNikita Kiryanov 	u_long	reg_lccr0;
31baaa7dd7SNikita Kiryanov 	u_long	fdadr0;
32baaa7dd7SNikita Kiryanov 	u_long	fdadr1;
33baaa7dd7SNikita Kiryanov 
34baaa7dd7SNikita Kiryanov 	/* DMA descriptors */
35baaa7dd7SNikita Kiryanov 	struct	pxafb_dma_descriptor *dmadesc_fblow;
36baaa7dd7SNikita Kiryanov 	struct	pxafb_dma_descriptor *dmadesc_fbhigh;
37baaa7dd7SNikita Kiryanov 	struct	pxafb_dma_descriptor *dmadesc_palette;
38baaa7dd7SNikita Kiryanov 
39baaa7dd7SNikita Kiryanov 	u_long	screen;		/* physical address of frame buffer */
40baaa7dd7SNikita Kiryanov 	u_long	palette;	/* physical address of palette memory */
41baaa7dd7SNikita Kiryanov 	u_int	palette_size;
42baaa7dd7SNikita Kiryanov };
43baaa7dd7SNikita Kiryanov 
44baaa7dd7SNikita Kiryanov /*
45baaa7dd7SNikita Kiryanov  * LCD controller stucture for PXA CPU
46baaa7dd7SNikita Kiryanov  */
47baaa7dd7SNikita Kiryanov typedef struct vidinfo {
48baaa7dd7SNikita Kiryanov 	ushort	vl_col;		/* Number of columns (i.e. 640) */
49baaa7dd7SNikita Kiryanov 	ushort	vl_row;		/* Number of rows (i.e. 480) */
50604c7d4aSHannes Petermaier 	ushort  vl_rot;		/* Rotation of Display (0, 1, 2, 3) */
51baaa7dd7SNikita Kiryanov 	ushort	vl_width;	/* Width of display area in millimeters */
52baaa7dd7SNikita Kiryanov 	ushort	vl_height;	/* Height of display area in millimeters */
53baaa7dd7SNikita Kiryanov 
54baaa7dd7SNikita Kiryanov 	/* LCD configuration register */
55baaa7dd7SNikita Kiryanov 	u_char	vl_clkp;	/* Clock polarity */
56baaa7dd7SNikita Kiryanov 	u_char	vl_oep;		/* Output Enable polarity */
57baaa7dd7SNikita Kiryanov 	u_char	vl_hsp;		/* Horizontal Sync polarity */
58baaa7dd7SNikita Kiryanov 	u_char	vl_vsp;		/* Vertical Sync polarity */
59baaa7dd7SNikita Kiryanov 	u_char	vl_dp;		/* Data polarity */
60baaa7dd7SNikita Kiryanov 	u_char	vl_bpix;/* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
61baaa7dd7SNikita Kiryanov 	u_char	vl_lbw;		/* LCD Bus width, 0 = 4, 1 = 8 */
62baaa7dd7SNikita Kiryanov 	u_char	vl_splt;/* Split display, 0 = single-scan, 1 = dual-scan */
63baaa7dd7SNikita Kiryanov 	u_char	vl_clor;	/* Color, 0 = mono, 1 = color */
64baaa7dd7SNikita Kiryanov 	u_char	vl_tft;		/* 0 = passive, 1 = TFT */
65baaa7dd7SNikita Kiryanov 
66baaa7dd7SNikita Kiryanov 	/* Horizontal control register. Timing from data sheet */
67baaa7dd7SNikita Kiryanov 	ushort	vl_hpw;		/* Horz sync pulse width */
68baaa7dd7SNikita Kiryanov 	u_char	vl_blw;		/* Wait before of line */
69baaa7dd7SNikita Kiryanov 	u_char	vl_elw;		/* Wait end of line */
70baaa7dd7SNikita Kiryanov 
71baaa7dd7SNikita Kiryanov 	/* Vertical control register. */
72baaa7dd7SNikita Kiryanov 	u_char	vl_vpw;		/* Vertical sync pulse width */
73baaa7dd7SNikita Kiryanov 	u_char	vl_bfw;		/* Wait before of frame */
74baaa7dd7SNikita Kiryanov 	u_char	vl_efw;		/* Wait end of frame */
75baaa7dd7SNikita Kiryanov 
76baaa7dd7SNikita Kiryanov 	/* PXA LCD controller params */
77baaa7dd7SNikita Kiryanov 	struct	pxafb_info pxa;
78baaa7dd7SNikita Kiryanov } vidinfo_t;
79baaa7dd7SNikita Kiryanov 
80baaa7dd7SNikita Kiryanov #endif
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