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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dintel,ixp4xx-expansion-bus-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel IXP4xx Expansion Bus Controller
10 The IXP4xx expansion bus controller handles access to devices on the
11 memory-mapped expansion bus on the Intel IXP4xx family of system on chips,
15 - Linus Walleij <linus.walleij@linaro.org>
19 pattern: '^bus@[0-9a-f]+$'
23 - enum:
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-arcom-vulcan.dts1 // SPDX-License-Identifier: ISC
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
27 stdout-path = "uart0:115200n8";
35 compatible = "w1-gpio";
41 flash@0,0 {
42 compatible = "intel,ixp4xx-flash", "cfi-flash";
[all …]
H A Dintel-ixp42x-gateworks-gw2348.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
25 stdout-path = "uart0:115200n8";
33 compatible = "gpio-leds";
34 led-user {
37 default-state = "on";
[all …]
H A Dintel-ixp43x-gateworks-gw2358.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for Gateworks IXP43x-based Cambria GW2358
6 /dts-v1/;
8 #include "intel-ixp43x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
32 compatible = "gpio-leds";
33 led-user {
36 default-state = "on";
[all …]
H A Dintel-ixp46x-ixdp465.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp45x-ixp46x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
21 flash@0,0 {
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
23 bank-width = <2>;
[all …]
H A Dintel-ixp43x-kixrp435.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp43x.dtsi"
10 #include "intel-ixp4xx-reference-design.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
21 flash@0,0 {
22 compatible = "intel,ixp4xx-flash", "cfi-flash";
23 bank-width = <2>;
[all …]
H A Dintel-ixp42x-ixdp425.dts1 // SPDX-License-Identifier: ISC
11 /dts-v1/;
13 #include "intel-ixp42x.dtsi"
14 #include "intel-ixp4xx-reference-design.dtsi"
15 #include <dt-bindings/input/input.h>
20 #address-cells = <1>;
21 #size-cells = <1>;
25 flash@0,0 {
26 compatible = "intel,ixp4xx-flash", "cfi-flash";
27 bank-width = <2>;
[all …]
H A Dintel-ixp4xx-reference-design.dtsi1 // SPDX-License-Identifier: ISC
5 * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465.
20 stdout-path = "uart0:115200n8";
28 compatible = "i2c-gpio";
29 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
30 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
31 #address-cells = <1>;
32 #size-cells = <0>;
36 * Philips PCF8582C-2T/03 512byte I2C EEPROM
43 read-only;
[all …]
H A Dintel-ixp42x-netgear-wg302v1.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
27 stdout-path = "uart1:9600n8";
37 flash@0,0 {
38 compatible = "intel,ixp4xx-flash", "cfi-flash";
39 bank-width = <2>;
[all …]
H A Dintel-ixp42x-gateway-7001.dts1 // SPDX-License-Identifier: ISC
7 /dts-v1/;
9 #include "intel-ixp42x.dtsi"
10 #include <dt-bindings/input/input.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
26 stdout-path = "uart1:115200n8";
36 flash@0,0 {
37 compatible = "intel,ixp4xx-flash", "cfi-flash";
38 bank-width = <2>;
[all …]
H A Dintel-ixp42x-adi-coyote.dts1 // SPDX-License-Identifier: ISC
5 * Ethernet set-up from OpenWrt.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
27 stdout-path = "uart1:115200n8";
38 flash@0,0 {
39 compatible = "intel,ixp4xx-flash", "cfi-flash";
[all …]
H A Dintel-ixp42x-ixdpg425.dts1 // SPDX-License-Identifier: ISC
5 * Ethernet set-up from OpenWrt.
15 /dts-v1/;
17 #include "intel-ixp42x.dtsi"
18 #include <dt-bindings/input/input.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
34 stdout-path = "uart0:115200n8";
43 flash@0,0 {
44 compatible = "intel,ixp4xx-flash", "cfi-flash";
[all …]
H A Dintel-ixp42x-goramo-multilink.dts1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
H A Dintel-ixp42x-linksys-wrv54g.dts1 // SPDX-License-Identifier: ISC
9 /dts-v1/;
11 #include "intel-ixp42x.dtsi"
12 #include <dt-bindings/input/input.h>
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = "uart1:115200n8";
39 compatible = "gpio-leds";
40 led-power {
43 default-state = "on";
[all …]
H A Dintel-ixp42x-welltech-epbx100.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "intel-ixp42x.dtsi"
13 #address-cells = <1>;
14 #size-cells = <1>;
24 stdout-path = "uart0:115200n8";
33 flash@0,0 {
34 compatible = "intel,ixp4xx-flash", "cfi-flash";
35 bank-width = <2>;
37 * 16 MB of Flash
[all …]
H A Dintel-ixp42x-freecom-fsg-3.dts1 // SPDX-License-Identifier: ISC
3 * Device Tree file for the Freecom FSG-3 router.
8 /dts-v1/;
10 #include "intel-ixp42x.dtsi"
11 #include <dt-bindings/input/input.h>
14 model = "Freecom FSG-3";
15 compatible = "freecom,fsg-3", "intel,ixp42x";
16 #address-cells = <1>;
17 #size-cells = <1>;
28 stdout-path = "uart0:115200n8";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dintel,ixp4xx-compact-flash.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/intel,ixp4xx-compact-flash.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel IXP4xx CompactFlash Card Controller
10 - Linus Walleij <linus.walleij@linaro.org>
13 The IXP4xx network processors have a CompactFlash interface that presents
15 device is always connected to the expansion bus of the IXP4xx SoCs using one
17 node must be placed inside a chip select node on the IXP4xx expansion bus.
21 const: intel,ixp4xx-compact-flash
[all …]
/openbmc/linux/Documentation/arch/arm/
H A Dixp4xx.rst2 Release Notes for Linux on Intel's IXP4xx Network Processor
6 -------------------------------------------------------------------------
10 Intel's IXP4xx network processor is a highly integrated SOC that
13 consumption. The IXP4xx family currently consists of several processors
16 supports faster speeds, new memory and flash configurations, and more
17 integration such as an on-chip I2C controller.
21 http://developer.intel.com/design/network/products/npfamily/ixp4xx.htm
23 Intel also made the IXCP1100 CPU for sometime which is an IXP4xx
28 Linux currently supports the following features on the IXP4xx chips:
30 - Dual serial ports
[all …]
/openbmc/linux/drivers/mtd/maps/
H A Dphysmap-ixp4xx.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel IXP4xx OF physmap add-on
6 * Based on the ixp4xx.c map driver, originally written by:
10 * Copyright (C) 2003-2004 MontaVista Software, Inc.
17 #include "physmap-ixp4xx.h"
20 * Read/write a 16 bit word from flash address 'addr'.
22 * When the cpu is in little-endian mode it swizzles the address lines
24 * and the like end up on the correct flash address.
27 * handles 32 bit reads, the byte stream ABCD is stored on the flash as:
29 * +---+---+
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Support non-linear mappings of flash chips"
10 paged mappings of flash chips.
13 tristate "Flash device in physical memory map"
16 This provides a 'mapping' driver which allows the NOR Flash and
19 the physical address and size of the flash chips on your
21 with config options or at run-time.
38 hex "Physical start address of flash mapping"
42 This is the physical memory location at which the flash chips
48 hex "Physical length of flash mapping"
[all …]
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
7 obj-$(CONFIG_MTD) += map_funcs.o
11 obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
12 obj-$(CONFIG_MTD_DC21285) += dc21285.o
13 obj-$(CONFIG_MTD_L440GX) += l440gx.o
14 obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
15 obj-$(CONFIG_MTD_ESB2ROM) += esb2rom.o
16 obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
17 obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o
18 obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o
[all …]
/openbmc/linux/drivers/bus/
H A Dintel-ixp4xx-eb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel IXP4xx Expansion Bus Controller
93 .prop = "intel,ixp4xx-eb-t1",
99 .prop = "intel,ixp4xx-eb-t2",
105 .prop = "intel,ixp4xx-eb-t3",
111 .prop = "intel,ixp4xx-eb-t4",
117 .prop = "intel,ixp4xx-eb-t5",
123 .prop = "intel,ixp4xx-eb-byte-access-on-halfword",
128 .prop = "intel,ixp4xx-eb-hpi-hrdy-pol-high",
133 .prop = "intel,ixp4xx-eb-mux-address-and-data",
[all …]
/openbmc/linux/drivers/ata/
H A Dpata_ixp4xx_cf.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ixp4xx PATA/Compact Flash driver
4 * Copyright (C) 2006-07 Tower Technologies
7 * An ATA driver to handle a Compact Flash connected
8 * to the ixp4xx expansion bus in TrueIDE mode. The CF
10 * on the ixp4xx. In the irq is not available, you might
50 #define IXP4XX_EXP_BYTE_RD16 BIT(6) /* Byte reads on half-word devices */
57 regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, in ixp4xx_set_8bit_timing()
61 regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, in ixp4xx_set_8bit_timing()
65 regmap_update_bits(ixpp->rmap, ixpp->cmd_csreg, in ixp4xx_set_8bit_timing()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
13 Flash chips (Memory Technology Devices) are often used for solid state
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
[all …]
/openbmc/u-boot/include/configs/
H A Dvct.h1 /* SPDX-License-Identifier: GPL-2.0+ */
52 #define CONFIG_SYS_NS16550_REG_SIZE -4
81 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
96 * FLASH and environment organization
102 * We need special accessor functions for the CFI FLASH driver. This
108 * For the non-memory-mapped NOR FLASH, we need to define the
109 * NOR FLASH area. This can't be detected via the addr2info()
110 * function, since we check for flash access in the very early
111 * U-Boot code, before the NOR FLASH is detected.
120 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
[all …]

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