1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2021 Corentin Labbe <clabbe@baylibre.com>
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring
8*724ba675SRob Herring#include "intel-ixp42x.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring	model = "Welltech EPBX100";
12*724ba675SRob Herring	compatible = "welltech,epbx100", "intel,ixp42x";
13*724ba675SRob Herring	#address-cells = <1>;
14*724ba675SRob Herring	#size-cells = <1>;
15*724ba675SRob Herring
16*724ba675SRob Herring	memory@0 {
17*724ba675SRob Herring		/* 64 MB SDRAM */
18*724ba675SRob Herring		device_type = "memory";
19*724ba675SRob Herring		reg = <0x00000000 0x4000000>;
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	chosen {
23*724ba675SRob Herring		bootargs = "console=ttyS0,115200n8 root=/dev/ram0 initrd=0x00800000,9M";
24*724ba675SRob Herring		stdout-path = "uart0:115200n8";
25*724ba675SRob Herring	};
26*724ba675SRob Herring
27*724ba675SRob Herring	aliases {
28*724ba675SRob Herring		serial0 = &uart0;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	soc {
32*724ba675SRob Herring		bus@c4000000 {
33*724ba675SRob Herring			flash@0,0 {
34*724ba675SRob Herring				compatible = "intel,ixp4xx-flash", "cfi-flash";
35*724ba675SRob Herring				bank-width = <2>;
36*724ba675SRob Herring				/*
37*724ba675SRob Herring				 * 16 MB of Flash
38*724ba675SRob Herring				 */
39*724ba675SRob Herring				reg = <0 0x00000000 0x1000000>;
40*724ba675SRob Herring
41*724ba675SRob Herring				partitions {
42*724ba675SRob Herring					compatible = "fixed-partitions";
43*724ba675SRob Herring					#address-cells = <1>;
44*724ba675SRob Herring					#size-cells = <1>;
45*724ba675SRob Herring
46*724ba675SRob Herring					partition@0 {
47*724ba675SRob Herring						label = "RedBoot";
48*724ba675SRob Herring						reg = <0x00000000 0x00080000>;
49*724ba675SRob Herring						read-only;
50*724ba675SRob Herring					};
51*724ba675SRob Herring					partition@80000 {
52*724ba675SRob Herring						label = "zImage";
53*724ba675SRob Herring						reg = <0x00080000 0x00100000>;
54*724ba675SRob Herring						read-only;
55*724ba675SRob Herring					};
56*724ba675SRob Herring					partition@180000 {
57*724ba675SRob Herring						label = "ramdisk";
58*724ba675SRob Herring						reg = <0x00180000 0x00300000>;
59*724ba675SRob Herring						read-only;
60*724ba675SRob Herring					};
61*724ba675SRob Herring					partition@480000 {
62*724ba675SRob Herring						label = "User";
63*724ba675SRob Herring						reg = <0x00480000 0x00b60000>;
64*724ba675SRob Herring						read-only;
65*724ba675SRob Herring					};
66*724ba675SRob Herring					partition@fe0000 {
67*724ba675SRob Herring						label = "FIS directory";
68*724ba675SRob Herring						reg = <0x00fe0000 0x001f000>;
69*724ba675SRob Herring						read-only;
70*724ba675SRob Herring					};
71*724ba675SRob Herring					partition@fff000 {
72*724ba675SRob Herring						label = "RedBoot config";
73*724ba675SRob Herring						reg = <0x00fff000 0x0001000>;
74*724ba675SRob Herring						read-only;
75*724ba675SRob Herring					};
76*724ba675SRob Herring				};
77*724ba675SRob Herring			};
78*724ba675SRob Herring		};
79*724ba675SRob Herring
80*724ba675SRob Herring		/* LAN port */
81*724ba675SRob Herring		ethernet@c8009000 {
82*724ba675SRob Herring			status = "okay";
83*724ba675SRob Herring			queue-rx = <&qmgr 3>;
84*724ba675SRob Herring			queue-txready = <&qmgr 20>;
85*724ba675SRob Herring			phy-mode = "rgmii";
86*724ba675SRob Herring			phy-handle = <&phy5>;
87*724ba675SRob Herring
88*724ba675SRob Herring			mdio {
89*724ba675SRob Herring				#address-cells = <1>;
90*724ba675SRob Herring				#size-cells = <0>;
91*724ba675SRob Herring
92*724ba675SRob Herring				phy5: ethernet-phy@5 {
93*724ba675SRob Herring					reg = <5>;
94*724ba675SRob Herring				};
95*724ba675SRob Herring			};
96*724ba675SRob Herring		};
97*724ba675SRob Herring	};
98*724ba675SRob Herring};
99