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/openbmc/u-boot/board/engicam/imx6q/
H A Dimx6q.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <asm/arch/iomux.h>
17 #include <asm/arch/mx6-pins.h>
19 #include <asm/mach-imx/iomux-v3.h>
20 #include <asm/mach-imx/video.h>
52 /* config gpmi nand iomux */ in setup_gpmi_nand()
56 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
59 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
68 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
71 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
[all …]
/openbmc/u-boot/board/aristainetos/
H A Daristainetos-v2.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/iomux.h>
15 #include <asm/arch/mx6-pins.h>
18 #include <asm/mach-imx/iomux-v3.h>
19 #include <asm/mach-imx/boot_mode.h>
20 #include <asm/mach-imx/mxc_i2c.h>
21 #include <asm/mach-imx/video.h>
128 /* RST_LOC# PHY reset input (has pull-down!)*/
252 return -1; in board_spi_cs_gpio()
[all …]
H A Daristainetos-v1.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/iomux.h>
15 #include <asm/arch/mx6-pins.h>
18 #include <asm/mach-imx/iomux-v3.h>
19 #include <asm/mach-imx/boot_mode.h>
20 #include <asm/mach-imx/mxc_i2c.h>
21 #include <asm/mach-imx/video.h>
102 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in setup_iomux_enet() local
107 setbits_le32(&iomux->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); in setup_iomux_enet()
[all …]
/openbmc/u-boot/board/boundary/nitrogen6x/
H A Dnitrogen6x.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
10 #include <asm/arch/imx-regs.h>
11 #include <asm/arch/iomux.h>
14 #include <asm/arch/mx6-pins.h>
17 #include <asm/mach-imx/iomux-v3.h>
18 #include <asm/mach-imx/mxc_i2c.h>
19 #include <asm/mach-imx/sata.h>
20 #include <asm/mach-imx/spi.h>
21 #include <asm/mach-imx/boot_mode.h>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx-iomuxc-gpr.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx-iomuxc-gpr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IOMUX Controller General Purpose Registers
10 - Peng Fan <peng.fan@nxp.com>
19 - items:
20 - const: fsl,imx8mq-iomuxc-gpr
21 - const: syscon
22 - const: simple-mfd
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Dmach-imx6sx.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 struct regmap *gpr; in imx6sx_enet_clk_sel() local
20 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sx-iomuxc-gpr"); in imx6sx_enet_clk_sel()
21 if (!IS_ERR(gpr)) { in imx6sx_enet_clk_sel()
22 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
24 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sx_enet_clk_sel()
27 pr_err("failed to find fsl,imx6sx-iomux-gpr regmap\n"); in imx6sx_enet_clk_sel()
52 imx6_pm_ccm_init("fsl,imx6sx-ccm"); in imx6sx_init_irq()
60 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sx_init_late()
H A Dmach-imx6sl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 struct regmap *gpr; in imx6sl_fec_init() local
23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr"); in imx6sl_fec_init()
24 if (!IS_ERR(gpr)) { in imx6sl_fec_init()
25 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
27 regmap_update_bits(gpr, IOMUXC_GPR1, in imx6sl_fec_init()
30 pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n"); in imx6sl_fec_init()
38 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); in imx6sl_init_late()
64 imx6_pm_ccm_init("fsl,imx6sl-ccm"); in imx6sl_init_irq()
[all …]
H A Dmach-imx7d.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
40 struct regmap *gpr; in imx7d_enet_clk_sel() local
42 gpr = syscon_regmap_lookup_by_compatible("fsl,imx7d-iomuxc-gpr"); in imx7d_enet_clk_sel()
43 if (!IS_ERR(gpr)) { in imx7d_enet_clk_sel()
44 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); in imx7d_enet_clk_sel()
45 regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); in imx7d_enet_clk_sel()
47 pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); in imx7d_enet_clk_sel()
66 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); in imx7d_init_late()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,mqs.txt4 - compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs"
5 "fsl,imx8qm-mqs", "fsl,imx8qxp-mqs", "fsl,imx93-mqs".
6 - clocks : A list of phandles + clock-specifiers, one for each entry in
7 clock-names
8 - clock-names : "mclk" - must required.
9 "core" - required if compatible is "fsl,imx8qm-mqs", it
11 - gpr : A phandle of General Purpose Registers in IOMUX Controller.
12 Required if compatible is "fsl,imx6sx-mqs".
14 Required if compatible is "fsl,imx8qm-mqs":
15 - power-domains: A phandle of PM domain provider node.
[all …]
/openbmc/u-boot/board/embest/mx6boards/
H A Dmx6boards.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/imx-regs.h>
18 #include <asm/arch/iomux.h>
19 #include <asm/arch/mx6-pins.h>
22 #include <asm/mach-imx/iomux-v3.h>
23 #include <asm/mach-imx/boot_mode.h>
24 #include <asm/mach-imx/mxc_i2c.h>
25 #include <asm/mach-imx/spi.h>
26 #include <asm/mach-imx/video.h>
69 static int board_type = -1;
[all …]
/openbmc/u-boot/arch/arm/mach-imx/
H A Dcache.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/mach-imx/sys_proto.h>
51 /* Set ACTLR.SMP bit for Cortex-A7 */ in enable_caches()
54 /* Enable D-cache. I-cache is already enabled in start.S */ in enable_caches()
69 * Set ACTLR.SMP bit for Cortex-A7, even if the caches are in enable_caches()
70 * disabled by u-boot in enable_caches()
84 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in v7_outer_cache_enable() local
92 clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); in v7_outer_cache_enable()
96 * is cleared, PL310 treats Normal Shared Non-cacheable in v7_outer_cache_enable()
97 * accesses as Cacheable no-allocate. in v7_outer_cache_enable()
[all …]
H A Dsata.c1 // SPDX-License-Identifier: GPL-2.0+
6 #include <asm/mach-imx/iomux-v3.h>
7 #include <asm/arch/iomux.h>
24 clrsetbits_le32(&iomuxc_regs->gpr[13], in setup_sata()
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx27-pinctrl.txt1 * Freescale IMX27 IOMUX Controller
4 - compatible: "fsl,imx27-iomuxc"
9 - fsl,pins: three integers array, represents a group of pins mux and config
21 0 - Primary function
22 1 - Alternate function
23 2 - GPIO
24 Registers: GIUS (GPIO In Use), GPR (General Purpose Register)
28 0 - Input
29 1 - Output
37 0 - A_IN
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx8mq-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8mq-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ MIPI CSI-2 receiver
10 - Martin Kepplinger <martin.kepplinger@puri.sm>
12 description: |-
13 This binding covers the CSI-2 RX PHY and host controller included in the
20 - fsl,imx8mq-mipi-csi2
27 - description: core is the RX Controller Core Clock input. This clock
[all …]
/openbmc/u-boot/board/ge/mx53ppd/
H A Dmx53ppd_video.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/iomux-mx53.h>
18 #include <asm/arch/imx-regs.h>
26 .name = "NV-SPWGRGB888",
80 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in lcd_enable() local
83 clrsetbits_le32(&mxc_ccm->cscmr2, in lcd_enable()
89 setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_LDB_DI0(3)); in lcd_enable()
92 setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_IPU_DI0(3)); in lcd_enable()
98 &iomux->gpr[2]); in lcd_enable()
/openbmc/u-boot/board/ge/bx50v3/
H A Dbx50v3.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/iomux.h>
11 #include <asm/arch/mx6-pins.h>
14 #include <asm/mach-imx/mxc_i2c.h>
15 #include <asm/mach-imx/iomux-v3.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/video.h>
71 gd->ram_size = imx_ddr_size(); in dram_init()
207 return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; in board_spi_cs_gpio()
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dsoc.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/dma.h>
18 #include <asm/mach-imx/hab.h>
63 return readl(&scu->config) & 3; in get_nr_cpus()
69 u32 reg = readl(&anatop->digprog_sololite); in get_cpu_rev()
74 reg = readl(&anatop->digprog); in get_cpu_rev()
76 cfg = readl(&scu->config) & 3; in get_cpu_rev()
92 major--; in get_cpu_rev()
[all …]
/openbmc/u-boot/board/toradex/apalis_imx6/
H A Dapalis_imx6.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
5 * Copyright (C) 2014-2016, Toradex AG
15 #include <asm/arch/imx-regs.h>
16 #include <asm/arch/iomux.h>
18 #include <asm/arch/mx6-pins.h>
19 #include <asm/arch/mx6-ddr.h>
23 #include <asm/mach-imx/iomux-v3.h>
24 #include <asm/mach-imx/mxc_i2c.h>
25 #include <asm/mach-imx/sata.h>
[all …]
/openbmc/u-boot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/iomux.h>
11 #include <asm/arch/mx6-pins.h>
12 #include <asm/mach-imx/spi.h>
15 #include <asm/mach-imx/mxc_i2c.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/boot_mode.h>
18 #include <asm/mach-imx/video.h>
33 #include <usb/ehci-ci.h>
[all …]
/openbmc/u-boot/board/freescale/imx8mq_evk/
H A Dimx8mq_evk.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <asm/mach-imx/iomux-v3.h>
13 #include <asm-generic/gpio.h>
18 #include <asm/mach-imx/gpio.h>
19 #include <asm/mach-imx/mxc_i2c.h>
57 gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1]; in dram_init()
59 gd->ram_size = PHYS_SDRAM_SIZE; in dram_init()
83 struct iomuxc_gpr_base_regs *gpr = in setup_fec() local
89 clrsetbits_le32(&gpr->gpr[1], BIT(13) | BIT(17), 0); in setup_fec()
102 if (phydev->drv->config) in board_phy_config()
[all …]
/openbmc/u-boot/board/advantech/dms-ba16/
H A Ddms-ba16.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/imx-regs.h>
10 #include <asm/arch/iomux.h>
11 #include <asm/arch/mx6-pins.h>
14 #include <asm/mach-imx/mxc_i2c.h>
15 #include <asm/mach-imx/iomux-v3.h>
16 #include <asm/mach-imx/boot_mode.h>
17 #include <asm/mach-imx/video.h>
63 gd->ram_size = imx_ddr_size(); in dram_init()
199 return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; in board_spi_cs_gpio()
[all …]
/openbmc/u-boot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/mxc_i2c.h>
18 #include <asm/mach-imx/boot_mode.h>
19 #include <asm/mach-imx/spi.h>
28 #include <asm/mach-imx/video.h>
67 gd->ram_size = imx_ddr_size(); in dram_init()
[all …]
/openbmc/u-boot/board/barco/platinum/
H A Dplatinum_picon.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/iomux.h>
12 #include <asm/arch/mx6-pins.h>
13 #include <asm/mach-imx/iomux-v3.h>
14 #include <asm/mach-imx/mxc_i2c.h>
127 * This enet related pin-muxing and GPIO handling is done
128 * in SPL U-Boot. For early initialization. And to give the
129 * PHY some time to come out of reset before the U-Boot
134 struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; in platinum_setup_enet() local
148 setbits_le32(&iomux->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); in platinum_setup_enet()
[all …]
/openbmc/u-boot/board/toradex/colibri_imx6/
H A Dcolibri_imx6.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
5 * Copyright (C) 2014-2016, Toradex AG
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/iomux.h>
15 #include <asm/arch/mx6-pins.h>
16 #include <asm/arch/mx6-ddr.h>
21 #include <asm/mach-imx/iomux-v3.h>
22 #include <asm/mach-imx/mxc_i2c.h>
23 #include <asm/mach-imx/sata.h>
[all …]
/openbmc/linux/include/linux/mfd/syscon/
H A Dimx7-iomuxc-gpr.h1 /* SPDX-License-Identifier: GPL-2.0-only */
33 /* For imx7d iomux gpr register field define */

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