1 // SPDX-License-Identifier: GPL-2.0+
11 #include <asm/arch/imx-regs.h>
12 #include <asm/arch/iomux.h>
13 #include <asm/arch/mx6-pins.h>
16 #include <asm/mach-imx/iomux-v3.h>
17 #include <asm/mach-imx/mxc_i2c.h>
18 #include <asm/mach-imx/boot_mode.h>
19 #include <asm/mach-imx/spi.h>
28 #include <asm/mach-imx/video.h>
67 	gd->ram_size = imx_ddr_size();  in dram_init()
213 	writel(0x00020181, &weim_regs->cs0gcr1);  in eimnor_cs_setup()
214 	writel(0x00000001, &weim_regs->cs0gcr2);  in eimnor_cs_setup()
215 	writel(0x0a020000, &weim_regs->cs0rcr1);  in eimnor_cs_setup()
216 	writel(0x0000c000, &weim_regs->cs0rcr2);  in eimnor_cs_setup()
217 	writel(0x0804a240, &weim_regs->cs0wcr1);  in eimnor_cs_setup()
218 	writel(0x00000120, &weim_regs->wcr);  in eimnor_cs_setup()
230 	ccgr6 = readl(&imx_ccm->CCGR6);  in eim_clk_setup()
232 	writel(ccgr6, &imx_ccm->CCGR6);  in eim_clk_setup()
235 	 * Configure clk_eim_slow_sel = 00 --> derive clock from AXI clk root  in eim_clk_setup()
236 	 * and aclk_eim_slow_podf = 01 --> divide by 2  in eim_clk_setup()
239 	cscmr1 = readl(&imx_ccm->cscmr1);  in eim_clk_setup()
243 	writel(cscmr1, &imx_ccm->cscmr1);  in eim_clk_setup()
247 	writel(ccgr6, &imx_ccm->CCGR6);  in eim_clk_setup()
329 	/* config gpmi nand iomux */  in setup_gpmi_nand()
337 	setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK);  in setup_gpmi_nand()
395 	if (phydev->drv->config)  in board_phy_config()
396 		phydev->drv->config(phydev);  in board_phy_config()
404 	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;  in disable_lvds()  local
406 	clrbits_le32(&iomux->gpr[2],  in disable_lvds()
418 	.bus	= -1,
424 		.name           = "Hannstar-XGA",
438 	.bus	= -1,
474 	struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;  in setup_display()  local
482 	reg = readl(&mxc_ccm->CCGR3);  in setup_display()
484 	writel(reg, &mxc_ccm->CCGR3);  in setup_display()
487 	reg = readl(&mxc_ccm->cs2cdr);  in setup_display()
492 	writel(reg, &mxc_ccm->cs2cdr);  in setup_display()
494 	reg = readl(&mxc_ccm->cscmr2);  in setup_display()
496 	writel(reg, &mxc_ccm->cscmr2);  in setup_display()
498 	reg = readl(&mxc_ccm->chsccdr);  in setup_display()
503 	writel(reg, &mxc_ccm->chsccdr);  in setup_display()
513 	writel(reg, &iomux->gpr[2]);  in setup_display()
515 	reg = readl(&iomux->gpr[3]);  in setup_display()
522 	writel(reg, &iomux->gpr[3]);  in setup_display()
528  * Use always serial for U-Boot console
552 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;  in board_init()
554 	/* I2C 2 and 3 setup - I2C 3 hw mux with EIM */  in board_init()
586 	return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 9)) : -1;  in board_spi_cs_gpio()
597 		return -ENODEV;  in power_init_board()
640 	printf("Board: MX6Q-Sabreauto rev%c\n", nxp_board_rev_string());  in checkboard()
660 		return -EINVAL;  in board_ehci_hcd_init()
667 #include <asm/arch/mx6-ddr.h>
682 	writel(0x00C03F3F, &ccm->CCGR0);  in ccgr_init()
683 	writel(0x0030FC03, &ccm->CCGR1);  in ccgr_init()
684 	writel(0x0FFFC000, &ccm->CCGR2);  in ccgr_init()
685 	writel(0x3FF00000, &ccm->CCGR3);  in ccgr_init()
686 	writel(0x00FFF300, &ccm->CCGR4);  in ccgr_init()
687 	writel(0x0F0000C3, &ccm->CCGR5);  in ccgr_init()
688 	writel(0x000003FF, &ccm->CCGR6);  in ccgr_init()
1017 	/* iomux and setup of i2c */  in board_init_f()
1023 	/* UART clocks enabled and gd valid - init serial console */  in board_init_f()
1027 	memset(__bss_start, 0, __bss_end - __bss_start);  in board_init_f()
1038 		if (!strcmp(name, "imx6q-sabreauto"))  in board_fit_config_name_match()
1041 		if (!strcmp(name, "imx6qp-sabreauto"))  in board_fit_config_name_match()
1044 		if (!strcmp(name, "imx6dl-sabreauto"))  in board_fit_config_name_match()
1048 	return -1;  in board_fit_config_name_match()