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/openbmc/linux/drivers/auxdisplay/
H A DKconfig380 -1..-17 : connected to the same pin through an inverter (eg: transistor).
395 -1..-17 : connected to the same pin through an inverter (eg: transistor).
410 -1..-17 : connected to the same pin through an inverter (eg: transistor).
425 -1..-17 : connected to the same pin through an inverter (eg: transistor).
440 -1..-17 : connected to the same pin through an inverter (eg: transistor).
455 -1..-17 : connected to the same pin through an inverter (eg: transistor).
/openbmc/u-boot/drivers/mmc/
H A Ds5p_sdhci.c54 * Inverter delay means10ns delay if SDCLK 50MHz setting in s5p_sdhci_set_control_reg()
57 * 00 = Delay3 (inverter delay) in s5p_sdhci_set_control_reg()
58 * 10 = Delay4 (inverter delay + 2ns) in s5p_sdhci_set_control_reg()
/openbmc/linux/include/sound/
H A Dwm0010.h16 /* Set if there is an inverter between the GPIO controlling
/openbmc/linux/drivers/clk/meson/
H A Dclk-phase.c130 * This drive a bit clock inverter for which the
131 * opposite value of the inverter bit needs to be manually
/openbmc/linux/drivers/irqchip/
H A Dirq-uniphier-aidet.c21 #define UNIPHIER_AIDET_DETCONF 0x04 /* inverter register base */
61 /* enable inverter for active low triggers */ in uniphier_aidet_irq_set_type()
H A Dqcom-pdc.c106 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
108 * For the inverter to work, the polarity bit in the IRQ_CONFIG register has to
/openbmc/linux/drivers/clk/rockchip/
H A DMakefile12 clk-rockchip-y += clk-inverter.o
H A Dclk-rk3188.c340 INVERTER(0, "pclk_cif0", "pclkin_cif0",
369 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
598 INVERTER(0, "pclk_cif1", "pclkin_cif1",
H A Dclk-rk3288.c642 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
821 INVERTER(0, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
823 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
H A Dclk-rk3368.c463 INVERTER(PCLK_ISP, "pclk_isp", "pclk_isp_in",
468 INVERTER(PCLK_VIP, "pclk_vip", "pclk_vip_in",
H A Dclk.h856 #define INVERTER(_id, cname, pname, io, is, if) \ macro
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsocionext,uniphier-aidet.yaml12 rising edge interrupts. The AIDET provides logic inverter to support low
H A Dmediatek,sysirq.txt3 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
/openbmc/linux/sound/soc/codecs/
H A Dmt6359-accdet.c112 /* disable inverter */ in adjust_eint_digital_setting()
117 /* disable inverter */ in adjust_eint_digital_setting()
212 /* enable inverter */ in recover_eint_digital_setting()
218 /* enable inverter */ in recover_eint_digital_setting()
713 /* enable inverter detection */ in config_digital_init_by_mode()
715 /* disable inverter detection */ in config_digital_init_by_mode()
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h618-orangepi-zero3.dts28 * inverter, but it just doesn't work.
/openbmc/u-boot/board/samsung/universal_c210/
H A Duniversal.c365 * you should set it HIGH since it removes the inverter in exynos_init()
373 * Default reset state is High and there's no inverter in exynos_init()
/openbmc/linux/drivers/net/phy/
H A Dbcm7xxx.c160 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_config_init()
397 * where the internal inverter may not allow the first MDIO transaction in bcm7xxx_28nm_ephy_config_init()
833 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_probe()
H A Dbcm-cygnus.c139 * internal inverter may not allow the first MDIO transaction to pass in bcm_omega_config_init()
/openbmc/linux/drivers/rtc/
H A Drtc-ds1302.c114 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1302_probe()
H A Drtc-ds1305.c561 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1305_probe()
/openbmc/linux/drivers/media/rc/
H A Dst_rc.c46 #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5422-odroidxu3-common.dtsi29 * as a 16ms debouce filter and signal inverter with
/openbmc/linux/arch/x86/platform/olpc/
H A Dolpc-xo1-sci.c110 * front-end inverter to ensure that that's the edge we're always in detect_lid_state()
/openbmc/linux/drivers/mtd/nand/raw/ingenic/
H A Dingenic_nand_drv.c387 * inverter on this board, it should be active-high. Let's fix that in ingenic_nand_init_chip()
/openbmc/linux/drivers/pwm/
H A Dpwm-samsung.c74 * @inverter_mask: inverter status for all channels - one bit per channel

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