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Searched full:interprocessor (Results 1 – 22 of 22) sorted by relevance

/openbmc/linux/drivers/mailbox/
H A DKconfig58 An implementation of the ARM PL320 Interprocessor Communication
79 interprocessor communication involving DSP, IVA1.0 and IVA2 in
134 hardware for interprocessor communication.
200 The Tegra HSP driver is used for the interprocessor communication
209 An implementation of the APM X-Gene Interprocessor Communication
/openbmc/u-boot/doc/device-tree-bindings/mailbox/
H A Dnvidia,tegra186-hsp.txt5 interprocessor communication. So the interprocessor communication (IPC)
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dnvidia,tegra186-hsp.yaml16 primitives for interprocessor communication. So the interprocessor
/openbmc/linux/include/linux/
H A Domap-mailbox.h3 * omap-mailbox: interprocessor communication module for OMAP
/openbmc/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra210-bpmp.txt9 interprocessor communication (IPC) between the CPU and BPMP.
H A Dnvidia,tegra186-bpmp.yaml18 which can create the interprocessor communication (IPC) between the
/openbmc/u-boot/doc/device-tree-bindings/firmware/
H A Dnvidia,tegra186-bpmp.txt7 which can create the interprocessor communication (IPC) between the CPU
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_86xx.h523 uint ipidr0; /* 0x40040 - Interprocessor Interrupt Dispatch Register 0 */
525 uint ipidr1; /* 0x40050 - Interprocessor Interrupt Dispatch Register 1 */
527 uint ipidr2; /* 0x40060 - Interprocessor Interrupt Dispatch Register 2 */
529 uint ipidr3; /* 0x40070 - Interprocessor Interrupt Dispatch Register 3 */
823 uint ipi0dr0; /* 0x60040 - Processor 0 Interprocessor Interrupt Dispatch Register 0 */
825 uint ipi0dr1; /* 0x60050 - Processor 0 Interprocessor Interrupt Dispatch Register 1 */
827 uint ipi0dr2; /* 0x60060 - Processor 0 Interprocessor Interrupt Dispatch Register 2 */
829 uint ipi0dr3; /* 0x60070 - Processor 0 Interprocessor Interrupt Dispatch Register 3 */
H A Dimmap_85xx.h623 u32 ipidr0; /* Interprocessor IRQ Dispatch 0 */
625 u32 ipidr1; /* Interprocessor IRQ Dispatch 1 */
627 u32 ipidr2; /* Interprocessor IRQ Dispatch 2 */
629 u32 ipidr3; /* Interprocessor IRQ Dispatch 3 */
907 u32 ipi0dr0; /* Processor 0 Interprocessor IRQ Dispatch 0 */
909 u32 ipi0dr1; /* Processor 0 Interprocessor IRQ Dispatch 1 */
911 u32 ipi0dr2; /* Processor 0 Interprocessor IRQ Dispatch 2 */
913 u32 ipi0dr3; /* Processor 0 Interprocessor IRQ Dispatch 3 */
/openbmc/linux/arch/alpha/kernel/
H A Drtc.c146 * This requires marshalling the data across an interprocessor call.
H A Dirq_alpha.c64 printk(KERN_CRIT "Interprocessor interrupt? " in do_entInt()
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dst,stm32-rproc.yaml83 has to stop interprocessor communication.
/openbmc/linux/drivers/cpufreq/
H A Dpowernow-k8.h93 * - lowest frequency must be >= interprocessor hypertransport link speed
/openbmc/qemu/target/hppa/
H A Dint_helper.c41 * another CPU for SMP interprocessor interrupts.
/openbmc/linux/arch/s390/kvm/
H A Dsigp.c3 * handling interprocessor communication
/openbmc/linux/arch/mips/kernel/
H A Dsmp-bmips.c68 /* SW interrupts 0,1 are used for interprocessor signaling */
/openbmc/qemu/hw/intc/
H A Driscv_aclint.c9 * This provides real-time clock, timer and interprocessor interrupts.
/openbmc/linux/arch/xtensa/
H A DKconfig235 The MX interrupt distributer adds Interprocessor Interrupts
/openbmc/linux/Documentation/
H A Dmemory-barriers.txt80 - Interprocessor interaction.
2348 (*) Interprocessor interaction.
2357 INTERPROCESSOR INTERACTION
2461 While they are technically interprocessor interaction considerations, atomic
/openbmc/qemu/hw/arm/
H A Dboot.c109 * for an interprocessor interrupt and polling a configurable
/openbmc/linux/tools/perf/Documentation/
H A Dperf-intel-pt.txt1689 5 SIPI startup interprocessor interrupt
/openbmc/linux/Documentation/RCU/Design/Requirements/
H A DRequirements.rst2673 well as zero interprocessor interrupts undertaken during an expedited