| /openbmc/linux/drivers/net/arcnet/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
25 tristate "Enable standard ARCNet packet format (RFC 1201)"
29 industry-standard RFC1201 implementations, like the arcether.com
39 software complying with the "old" standard, specifically, the DOS
42 industry-standard RFC1201 implementations, like the arcether.com
71 Cap only listens to protocol 1-8.
76 This is the chipset driver for the standard COM90xx cards. If you
87 IO-mapped mode instead of memory-mapped mode. This is slower than
98 time only using memory-mapped mode, and no IO ports at all. This
103 be called arc-rimi.
|
| /openbmc/openbmc/meta-openembedded/meta-networking/recipes-support/cim-schema/files/ |
| H A D | LICENSE | 1 // Copyright 1998-2008 Distributed Management Task Force, Inc. (DMTF).
3 // DMTF is a not-for-profit association of industry members dedicated
6 // members and non-members, provided that correct attribution is given.
10 // Implementation of certain elements of this standard or proposed
11 // standard may be subject to third party patent rights, including
13 // no representations to users of the standard as to the existence
21 // reliance on the standard or incorporation thereof in its product,
23 // any party implementing such standard, whether such implementation
26 // a standard is withdrawn or modified after publication, and shall be
28 // standard from any and all claims of infringement by a patent owner
[all …]
|
| /openbmc/openbmc/meta-openembedded/meta-networking/licenses/ |
| H A D | DMTF | 1 // Copyright 1998-2008 Distributed Management Task Force, Inc. (DMTF).
3 // DMTF is a not-for-profit association of industry members dedicated
6 // members and non-members, provided that correct attribution is given.
10 // Implementation of certain elements of this standard or proposed
11 // standard may be subject to third party patent rights, including
13 // no representations to users of the standard as to the existence
21 // reliance on the standard or incorporation thereof in its product,
23 // any party implementing such standard, whether such implementation
26 // a standard is withdrawn or modified after publication, and shall be
28 // standard from any and all claims of infringement by a patent owner
[all …]
|
| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-xserver/xserver-xf86-config/qemux86-64/ |
| H A D | xorg.conf | 9 Modeline "1024x600_60.00" 49.00 1024 1072 1168 1312 600 603 613 624 -hsync +vsync
10 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
11 ModeLine "640x480" 25.2 640 656 752 800 480 490 492 525 -hsync -vsync
13 ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync
15 ModeLine "640x480" 31.5 640 656 720 840 480 481 484 500 -hsync -vsync
17 ModeLine "640x480" 36.0 640 696 752 832 480 481 484 509 -hsync -vsync
|
| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-xserver/xserver-xf86-config/qemuarm/ |
| H A D | xorg.conf | 14 Modeline "1024x600_60.00" 49.00 1024 1072 1168 1312 600 603 613 624 -hsync +vsync
15 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
16 ModeLine "640x480" 25.2 640 656 752 800 480 490 492 525 -hsync -vsync
18 ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync
20 ModeLine "640x480" 31.5 640 656 720 840 480 481 484 500 -hsync -vsync
22 ModeLine "640x480" 36.0 640 696 752 832 480 481 484 509 -hsync -vsync
|
| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-xserver/xserver-xf86-config/qemuppc/ |
| H A D | xorg.conf | 14 Modeline "1024x600_60.00" 49.00 1024 1072 1168 1312 600 603 613 624 -hsync +vsync
15 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
16 ModeLine "640x480" 25.2 640 656 752 800 480 490 492 525 -hsync -vsync
18 ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync
20 ModeLine "640x480" 31.5 640 656 720 840 480 481 484 500 -hsync -vsync
22 ModeLine "640x480" 36.0 640 696 752 832 480 481 484 509 -hsync -vsync
|
| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-xserver/xserver-xf86-config/qemush4/ |
| H A D | xorg.conf | 14 Modeline "1024x600_60.00" 49.00 1024 1072 1168 1312 600 603 613 624 -hsync +vsync
15 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
16 ModeLine "640x480" 25.2 640 656 752 800 480 490 492 525 -hsync -vsync
18 ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync
20 ModeLine "640x480" 31.5 640 656 720 840 480 481 484 500 -hsync -vsync
22 ModeLine "640x480" 36.0 640 696 752 832 480 481 484 509 -hsync -vsync
|
| /openbmc/openbmc/poky/meta/recipes-graphics/xorg-xserver/xserver-xf86-config/qemux86/ |
| H A D | xorg.conf | 9 Modeline "1024x600_60.00" 49.00 1024 1072 1168 1312 600 603 613 624 -hsync +vsync
10 # 640x480 @ 60Hz (Industry standard) hsync: 31.5kHz
11 ModeLine "640x480" 25.2 640 656 752 800 480 490 492 525 -hsync -vsync
13 ModeLine "640x480" 31.5 640 664 704 832 480 489 491 520 -hsync -vsync
15 ModeLine "640x480" 31.5 640 656 720 840 480 481 484 500 -hsync -vsync
17 ModeLine "640x480" 36.0 640 696 752 832 480 481 484 509 -hsync -vsync
|
| /openbmc/linux/Documentation/devicetree/bindings/ata/ |
| H A D | cavium-compact-flash.txt | 5 industry standard compact flash devices.
8 - compatible: "cavium,ebt3000-compact-flash";
12 - reg: The base address of the CF chip select banks. Depending on
15 - cavium,bus-width: The width of the connection to the CF devices. Valid
18 - cavium,true-ide: Optional, if present the CF connection is in True IDE mode.
20 - cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected
24 compact-flash@5,0 {
25 compatible = "cavium,ebt3000-compact-flash";
27 cavium,bus-width = <16>;
28 cavium,true-ide;
[all …]
|
| /openbmc/u-boot/include/ |
| H A D | s_record.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
7 /*--------------------------------------------------------------------------
9 * Motorola S-Record Format:
11 * Motorola S-Records are an industry-standard format for
13 * programmers. LSI Logic have extended this standard to include
14 * an S4-record containing an address and a symbol.
16 * The extended S-record standard is as follows:
27 * 1 data record with 16-bit address
28 * 2 data record with 24-bit address
29 * 3 data record with 32-bit address
[all …]
|
| /openbmc/linux/drivers/eisa/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
13 The Extended Industry Standard Architecture (EISA) bus was
21 Say Y here if you are building a kernel for an EISA-based machine.
32 the Adaptec AHA-284x).
|
| /openbmc/bmcweb/ |
| H A D | OEM_SCHEMAS.md | 17 Because of that, OEM properties in an open-source project pose many problems
21 possible. Adding machine-specific resources, properties, and types defeats a
22 large amount of reuse, as clients must implement machine-specific APIs, some of
25 and therefore needs to take care when adding new, non-standard APIs, given the
29 quality and testing than their spec-driven alternatives, given the lack of
36 have to break an API boundary to move to the standard implementation. Given the
37 effort it takes to break an API, it is much simpler to wait for the standard to
42 significantly limited scope, knowledge, and influence over the standard when
45 code we write within the industry.
82 the same level of quality as non-OEM.
|
| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | fsl,esai.txt | 3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
4 for serial communication with a variety of serial devices, including industry
5 standard codecs, Sony/Phillips Digital Interface (S/PDIF) transceivers, and
10 - compatible : Compatible list, should contain one of the following
12 "fsl,imx35-esai",
13 "fsl,vf610-esai",
14 "fsl,imx6ull-esai",
15 "fsl,imx8qm-esai",
17 - reg : Offset and length of the register set for the device.
19 - interrupts : Contains the spdif interrupt.
[all …]
|
| /openbmc/linux/drivers/net/ethernet/freescale/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
35 Say Y here if you want to use the built-in 10/100 Fast ethernet
45 This option enables support for the MPC5200's on-chip
55 an external MII PHY chip or 10 Mbps 7-wire interface
56 (Motorola? industry standard).
|
| /openbmc/openbmc/poky/meta/files/common-licenses/ |
| H A D | SISSL-1.2 | 1 SUN INDUSTRY STANDARDS SOURCE LICENSE
39 … Developer Grant The Initial Developer hereby grants You a world-wide, royalty-free, non-exclusive…
77 …L CODE IS FREE OF DEFECTS, MERCHANTABLE, FIT FOR A PARTICULAR PURPOSE OR NON-INFRINGING. THE ENTIR…
84 EXHIBIT A - Sun Industry Standards Source License
86 "The contents of this file are subject to the Sun Industry Standards Source License Version 1.2 (th…
105 EXHIBIT B - Standards
107 1.0 Requirements for project Standards. The requirements for project Standards are version-dependen…
111 …tions. If any of your Modifications do not meet the requirements of the Standard, then you must ch…
|
| /openbmc/u-boot/board/freescale/ls1021atwr/ |
| H A D | README | 2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/media/i2c/ |
| H A D | maxim,max96712.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Quad GMSL2 to CSI-2 Deserializer with GMSL1 Compatibility
11 - Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
15 CSI-2 D-PHY or C-PHY formatted outputs. The device allows each link to
16 simultaneously transmit bidirectional control-channel data while forward
18 four remotely located sensors using industry-standard coax or STP
23 MAX96712 can be paired with first-generation 3.12Gbps or 1.5Gbps GMSL1
34 enable-gpios: true
[all …]
|
| /openbmc/u-boot/board/intel/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0+
15 Intel quad-core Atom Processor E3800 with dual-channel DDR3L SODIMM
23 mini-ITX form factor containing the Intel Braswell SoC, which has
24 a 64-bit quad-core, single-thread, Intel Atom processor, along with
25 serial console, 10/100/1000 Ethernet, SD-Card, USB 2/3, SATA, PCIe,
50 eMMC flash on board, Wi-Fi, Bluetooth 4 and USB controllers.
56 Arduino-certified development and prototyping boards based on Intel
57 architecture. It includes an Intel Quark SoC X1000 processor, a 32-bit
58 single-core, single-thread, Intel Pentium processor instrunction set
60 along with 256MB DDR3 memory. It supports a wide range of industry
[all …]
|
| /openbmc/linux/tools/testing/selftests/bpf/ |
| H A D | generate_udp_fragments.py | 2 # SPDX-License-Identifier: GPL-2.0
9 said code. `scapy` is relatively industry standard and really
33 f.write("// SPDX-License-Identifier: GPL-2.0\n")
34 f.write("/* DO NOT EDIT -- this file is generated */\n")
|
| /openbmc/u-boot/board/freescale/ls1021aqds/ |
| H A D | README | 2 --------
6 ------------------
8 is built on Layerscape architecture, the industry's first software-aware,
9 core-agnostic networking architecture to offer unprecedented efficiency
12 A member of the value-performance tier, the QorIQ LS1021A processor provides
14 enterprise networking applications. Incorporating dual ARM Cortex-A7 cores
15 running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark
17 security features and the broadest array of high-speed interconnects and
18 optimized peripheral features ever offered in a sub-3 W processor.
23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/display/ |
| H A D | lvds.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
19 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
20 1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
23 [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
27 FPD-Link and FlatLink brands.
[all …]
|
| /openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | lvds-codec.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/lvds-codec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
16 LVDS is a physical layer specification defined in ANSI/TIA/EIA-644-A. Multiple
21 [JEIDA] "Digital Interface Standards for Monitor", JEIDA-59-1999, February
22 1999 (Version 1.0), Japan Electronic Industry Development Association (JEIDA)
25 [VESA] "VESA Notebook Panel Standard", October 2007 (Version 1.0), Video
28 Those devices have been marketed under the FPD-Link and FlatLink brand names
[all …]
|
| /openbmc/u-boot/board/freescale/bsc9131rdb/ |
| H A D | README | 2 --------
3 - BSC9131 is integrated device that targets Femto base station market.
5 technologies with MAPLE-B2F baseband acceleration processing elements.
6 - It's MAPLE disabled personality is called 9231.
9 . Power Architecture subsystem including a e500 processor with 256-Kbyte shared
11 . StarCore SC3850 DSP subsystem with a 512-Kbyte private L2 cache
13 Processing (MAPLE-B2F)
14 . A multi-standard baseband algorithm accelerator for Channel Decoding/Encoding,
20 . DDR3/3L memory interface with 32-bit data width without ECC and 16-bit with
21 ECC, up to 400-MHz clock/800 MHz data rate
[all …]
|
| /openbmc/docs/designs/ |
| H A D | cper-records.md | 1 # CPER records - CPER
3 Author: Ed Tanous - edtanous
5 Created: 5-22-2024
15 CPER stands for Common Platform Error Record and is defined as an industry
16 standard in the [UEFI Specification][uefi_spec], with CPU ISA specific
29 [clear][cper_examples] that they would like OpenBMC to be the long-term
32 This library hosts the meson-dev branch, which was added for the purpose of this
38 - A BMC should be able to decode binary CPER records originated from a CPER
41 - BMC should be able to recieve and decode CPER records from a CPU per the [CPER
44 - A BIOS/EDK2 build should be able to share decoding code with OpenBMC, to the
[all …]
|
| /openbmc/linux/Documentation/hwmon/ |
| H A D | lm75.rst | 10 Addresses scanned: I2C 0x48 - 0x4f
20 Addresses scanned: I2C 0x48 - 0x4f
44 http://www.maxim-ic.com/
134 https://www.nxp.com/docs/en/data-sheet/PCT2075.pdf
139 -----------
143 set and read to half-degree accuracy.
148 range of -55 to +125 degrees.
154 The original LM75 was typically used in combination with LM78-like chips
158 The LM75 is essentially an industry standard; there may be other
162 therefore be instantiated explicitly. Higher resolution up to 16-bit
|