/openbmc/qemu/tests/tcg/x86_64/system/ |
H A D | patch-target.c | 4 * This test target increments a value 100 times. The patcher converts the 5 * inc instruction to a nop, so it only increments the value once.
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Ipmi/ |
H A D | SOL.interface.yaml | 41 Character Accumulate Interval in 5ms increments. BMC will wait this 59 Retry Interval in 10ms increments.
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/openbmc/u-boot/board/freescale/common/ |
H A D | vid.h | 18 /* step the IR regulator in 5mV increments */
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/openbmc/qemu/include/qapi/ |
H A D | qobject-output-visitor.h | 31 * types, QBool for type 'bool'. For type 'any', it increments the
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/openbmc/u-boot/lib/efi_selftest/ |
H A D | efi_selftest_exitbootservices.c | 18 * Notification function, increments the notification count.
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H A D | efi_selftest_event_groups.c | 22 * Notification function, increments the notification count if parameter
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H A D | efi_selftest_events.c | 20 * Notification function, increments the notification count if parameter
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H A D | efi_selftest_tpl.c | 19 * Notification function, increments the notification count.
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H A D | efi_selftest_watchdog.c | 38 * Notification function, increments the notification count if parameter
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/openbmc/u-boot/drivers/board/ |
H A D | sandbox.c | 53 /* Increments with every call */ in board_sandbox_get_int()
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/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Smbios/ |
H A D | MDR_V2.interface.yaml | 43 A counter which increments each time directory updated.
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/openbmc/u-boot/arch/x86/include/asm/ |
H A D | atomic.h | 72 * Atomically increments @v by 1.
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/openbmc/u-boot/include/jffs2/ |
H A D | mini_inflate.h | 32 unsigned char *data; /* increments as we move from byte to byte */
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/openbmc/phosphor-fan-presence/docs/monitor/ |
H A D | method.md | 53 current target increments the counter by 1. Once the counter reaches the
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/openbmc/phosphor-buttons/inc/ |
H A D | button_factory.hpp | 102 // The index, 'countIter', starts at 1 and increments, in ButtonIFRegister()
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/openbmc/phosphor-net-ipmid/sol/ |
H A D | sol_manager.hpp | 139 * Character Accumulate Interval is 5 ms increments, 1-based value. The 174 * is 10 ms increments, 1-based value. The parameter value is
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/openbmc/u-boot/board/freescale/mpc8313erdb/ |
H A D | sdram.c | 61 #warning Chip select bounds is only configurable in 16MB increments in fixed_sdram()
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/openbmc/qemu/tests/qtest/migration/i386/ |
H A D | a-b-bootblock.S | 2 # repeatedly increments the first byte of each page in a 100MB
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/openbmc/qemu/hw/riscv/ |
H A D | riscv-iommu-hpm.c | 138 * increments if device_id matches DID_GSCID. If the transaction in riscv_iommu_hpm_incr_ctr() 139 * has a valid process_id, counter increments if device_id in riscv_iommu_hpm_incr_ctr()
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/openbmc/google-misc/subprojects/ncsid/src/ |
H A D | ncsi_state_machine.h | 83 // except that it also increments the failure counter.
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/openbmc/qemu/tests/bench/ |
H A D | atomic_add-bench.c | 29 " -m = use mutexes instead of atomic increments\n"
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/openbmc/qemu/target/mips/ |
H A D | internal.h | 51 * @CCRes: rate at which the coprocessor 0 counter increments 56 * increments is implementation dependent, and is a function of the
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/openbmc/pldm/docs/ |
H A D | bios_implementation.md | 48 "scalar_increment": "The scalar value that is used for the increments to this integer ",
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/openbmc/phosphor-power/phosphor-regulators/src/ |
H A D | phase_fault_detection.hpp | 140 * If the fault type was detected, increments the counter tracking
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/openbmc/u-boot/board/ve8313/ |
H A D | ve8313.c | 52 #warning Chip select bounds is only configurable in 16MB increments in fixed_sdram()
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