/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qxp-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 9 gpio-ranges = <&iomuxc 1 56 12>, 10 <&iomuxc 13 69 4>, 11 <&iomuxc 19 75 4>, 12 <&iomuxc 24 80 1>, 13 <&iomuxc 25 82 7>; 17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 18 gpio-ranges = <&iomuxc 0 89 9>, [all …]
|
H A D | imx8dxl-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 compatible = "nxp,imx8dxl-fspi"; 12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 14 gpio-ranges = <&iomuxc 0 47 13>, 15 <&iomuxc 13 61 4>, 16 <&iomuxc 19 67 4>, 17 <&iomuxc 24 72 1>; 21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 23 gpio-ranges = <&iomuxc 4 74 5>, 24 <&iomuxc 9 80 16>; [all …]
|
H A D | imx8qxp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2020 NXP 8 #include <dt-bindings/clock/imx8-clock.h> 9 #include <dt-bindings/clock/imx8-lpcg.h> 10 #include <dt-bindings/firmware/imx/rsrc.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/pinctrl/pads-imx8qxp.h> 15 #include <dt-bindings/thermal/thermal.h> [all …]
|
H A D | imx8dxl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/imx8-clock.h> 7 #include <dt-bindings/firmware/imx/rsrc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/pinctrl/pads-imx8dxl.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
|
H A D | imx8qxp-ai_ml.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 7 /dts-v1/; 9 #include "imx8qxp.dtsi" 13 compatible = "einfochips,imx8qxp-ai_ml", "fsl,imx8qxp"; 22 stdout-path = &lpuart2; 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&pinctrl_leds>; 35 user-led1 { 38 linux,default-trigger = "heartbeat"; [all …]
|
H A D | imx8qxp-mek.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 8 #include "imx8qxp.dtsi" 9 #include <dt-bindings/usb/pd.h> 13 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; 16 stdout-path = &lpuart0; 24 reg_usdhc2_vmmc: usdhc2-vmmc { 25 compatible = "regulator-fixed"; 26 regulator-name = "SD1_SPWR"; 27 regulator-min-microvolt = <3000000>; [all …]
|
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/pads-imx8qm.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | fsl,scu-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/fsl,scu-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: i.MX SCU Client Device Node - Pinctrl Based on SCU Message Protocol 10 - Dong Aisheng <aisheng.dong@nxp.com> 13 Client nodes are maintained as children of the relevant IMX-SCU device node. 15 (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt) 18 - $ref: pinctrl.yaml# 23 - fsl,imx8qm-iomuxc [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/firmware/ |
H A D | fsl,scu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 13 The System Controller Firmware (SCFW) is a low-level system function 14 which runs on a dedicated Cortex-M core to provide power, clock, and 17 The AP communicates with the SC using a multi-ported MU module found 26 const: fsl,imx-scu 28 clock-controller: 31 $ref: /schemas/clock/fsl,scu-clk.yaml [all …]
|
/openbmc/u-boot/drivers/misc/imx8/ |
H A D | scu.c | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dm/device-internal.h> 46 clrbits_le32(&base->cr, MU_CR_GIE_MASK | MU_CR_RIE_MASK | in mu_hal_init() 59 ret = readl_poll_timeout(&base->sr, val, val & mask, 10000); in mu_hal_sendmsg() 62 return -ETIMEDOUT; in mu_hal_sendmsg() 65 writel(msg, &base->tr[reg_index]); in mu_hal_sendmsg() 79 ret = readl_poll_timeout(&base->sr, val, val & mask, 10000); in mu_hal_receivemsg() 82 return -ETIMEDOUT; in mu_hal_receivemsg() 85 *msg = readl(&base->rr[reg_index]); in mu_hal_receivemsg() 97 return -EINVAL; in sc_ipc_read() [all …]
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | fsl-imx8qxp-mek.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2017-2018 NXP 6 /dts-v1/; 8 #include "fsl-imx8qxp.dtsi" 9 #include "fsl-imx8qxp-mek-u-boot.dtsi" 13 compatible = "fsl,imx8qxp-mek", "fsl,imx8qxp"; 17 stdout-path = &lpuart0; 20 reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 21 compatible = "regulator-fixed"; 22 regulator-name = "SD1_SPWR"; [all …]
|
H A D | fsl-imx8dx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include "fsl-imx8-ca35.dtsi" 8 #include <dt-bindings/soc/imx_rsrc.h> 9 #include <dt-bindings/soc/imx8_pd.h> 10 #include <dt-bindings/clock/imx8qxp-clock.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/pinctrl/pads-imx8qxp.h> 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "fsl,imx8dx", "fsl,imx8qxp"; [all …]
|
/openbmc/u-boot/drivers/pinctrl/nxp/ |
H A D | pinctrl-imx8.c | 1 // SPDX-License-Identifier: GPL-2.0+ 10 #include "pinctrl-imx.h" 27 { .compatible = "fsl,imx8qxp-iomuxc", .data = (ulong)&imx8_pinctrl_soc_info },
|
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | fsl,imx-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX Co-Processor 10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. 13 - Peng Fan <peng.fan@nxp.com> 18 - fsl,imx6sx-cm4 19 - fsl,imx7d-cm4 20 - fsl,imx7ulp-cm4 [all …]
|
/openbmc/linux/drivers/pinctrl/freescale/ |
H A D | pinctrl-imx8qxp.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 8 #include <dt-bindings/pinctrl/pads-imx8qxp.h> 19 #include "pinctrl-imx.h" 208 { .compatible = "fsl,imx8qxp-iomuxc", }, 226 .name = "imx8qxp-pinctrl",
|
/openbmc/linux/drivers/remoteproc/ |
H A D | imx_rproc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/firmware/imx/rsrc.h> 7 #include <linux/arm-smccc.h> 74 * struct imx_rproc_mem - slim internal memory structure 124 /* TCM CODE NON-SECURE */ 132 /* TCM SYS NON-SECURE*/ 185 /* QSPI Code - alias */ 187 /* DDR (Code) - alias */ 191 /* OCRAM_S - alias */ 205 /* TCML - alias */ [all …]
|
/openbmc/linux/ |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |