/openbmc/qemu/hw/arm/ |
H A D | fsl-imx25.c | 2 * Copyright (c) 2013 Jean-Christophe Dubois <jcd@tribudubois.net> 6 * Based on hw/arm/xlnx-zynqmp.c 27 #include "hw/arm/fsl-imx25.h" 29 #include "hw/qdev-properties.h" 31 #include "target/arm/cpu-qom.h" 40 object_initialize_child(obj, "cpu", &s->cpu, ARM_CPU_TYPE_NAME("arm926")); in fsl_imx25_init() 42 object_initialize_child(obj, "avic", &s->avic, TYPE_IMX_AVIC); in fsl_imx25_init() 44 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX25_CCM); in fsl_imx25_init() 47 object_initialize_child(obj, "uart[*]", &s->uart[i], TYPE_IMX_SERIAL); in fsl_imx25_init() 51 object_initialize_child(obj, "gpt[*]", &s->gpt[i], TYPE_IMX25_GPT); in fsl_imx25_init() [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx25-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx25-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sascha Hauer <s.hauer@pengutronix.de> 18 -------------------------- 152 const: fsl,imx25-ccm 160 '#clock-cells': 164 - compatible 165 - reg [all …]
|
/openbmc/qemu/docs/system/arm/ |
H A D | imx25-pdk.rst | 1 NXP i.MX25 PDK board (``imx25-pdk``) 4 The ``imx25-pdk`` board emulates the NXP i.MX25 Product Development Kit 9 - SD controller 10 - AVIC 11 - CCM 12 - GPT 13 - EPIT timers 14 - FEC 15 - RNGC 16 - I2C [all …]
|
/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx25.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 #include <dt-bindings/gpio/gpio.h> 6 #include "imx25-pinfunc.h" 9 #address-cells = <1>; 10 #size-cells = <1>; 13 * pre-existing /chosen node to be available to insert the 46 #address-cells = <1>; 47 #size-cells = <0>; 50 compatible = "arm,arm926ej-s"; 56 asic: asic-interrupt-controller@68000000 { [all …]
|
H A D | imx35.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "imx35-pinfunc.h" 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 38 #address-cells = <1>; 39 #size-cells = <0>; 42 compatible = "arm,arm1136jf-s"; 48 avic: avic-interrupt-controller@68000000 { 49 compatible = "fsl,imx35-avic", "fsl,avic"; [all …]
|
H A D | imx53.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include "imx53-pinfunc.h" 7 #include <dt-bindings/clock/imx5-clock.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 17 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; [all …]
|
H A D | imx50.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 #include "imx50-pinfunc.h" 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/imx5-clock.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 * pre-existing /chosen node to be available to insert the 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a8"; [all …]
|
H A D | imx6sl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6sl-pinfunc.h" 7 #include <dt-bindings/clock/imx6sl-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 14 * pre-existing /chosen node to be available to insert the 50 #address-cells = <1>; 51 #size-cells = <0>; 54 compatible = "arm,cortex-a9"; [all …]
|
H A D | imx6sll.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * Copyright 2017-2018 NXP. 8 #include <dt-bindings/clock/imx6sll-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include "imx6sll-pinfunc.h" 14 #address-cells = <1>; 15 #size-cells = <1>; 46 #address-cells = <1>; 47 #size-cells = <0>; [all …]
|
/openbmc/linux/drivers/clk/imx/ |
H A D | clk-imx25.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 42 #define ccm(x) (ccm_base + (x)) macro 82 clk[mpll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "mpll", "osc", ccm(CCM_MPCTL)); in __mx25_clocks_init() 83 clk[upll] = imx_clk_pllv1(IMX_PLLV1_IMX25, "upll", "osc", ccm(CCM_UPCTL)); in __mx25_clocks_init() 85 …clk[cpu_sel] = imx_clk_mux("cpu_sel", ccm(CCM_CCTL), 14, 1, cpu_sel_clks, ARRAY_SIZE(cpu_sel_clks)… in __mx25_clocks_init() 86 clk[cpu] = imx_clk_divider("cpu", "cpu_sel", ccm(CCM_CCTL), 30, 2); in __mx25_clocks_init() 87 clk[ahb] = imx_clk_divider("ahb", "cpu", ccm(CCM_CCTL), 28, 2); in __mx25_clocks_init() 88 clk[usb_div] = imx_clk_divider("usb_div", "upll", ccm(CCM_CCTL), 16, 6); in __mx25_clocks_init() 90 …clk[per0_sel] = imx_clk_mux("per0_sel", ccm(CCM_MCR), 0, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)… in __mx25_clocks_init() 91 …clk[per1_sel] = imx_clk_mux("per1_sel", ccm(CCM_MCR), 1, 1, per_sel_clks, ARRAY_SIZE(per_sel_clks)… in __mx25_clocks_init() [all …]
|
/openbmc/qemu/include/hw/misc/ |
H A D | imx25_ccm.h | 2 * IMX25 Clock Control Module 5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 8 * See the COPYING file in the top-level directory. 66 #define TYPE_IMX25_CCM "imx25.ccm"
|
/openbmc/qemu/hw/misc/ |
H A D | imx25_ccm.c | 2 * IMX25 Clock Control Module 5 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 8 * See the COPYING file in the top-level directory. 11 * the CCM. 115 if (EXTRACT(s->reg[IMX25_CCM_CCTL_REG], MPLL_BYPASS)) { in imx25_ccm_get_mpll_clk() 118 freq = imx_ccm_calc_pll(s->reg[IMX25_CCM_MPCTL_REG], CKIH_FREQ); in imx25_ccm_get_mpll_clk() 133 if (EXTRACT(s->reg[IMX25_CCM_CCTL_REG], ARM_SRC)) { in imx25_ccm_get_mcu_clk() 137 freq = freq / (1 + EXTRACT(s->reg[IMX25_CCM_CCTL_REG], ARM_CLK_DIV)); in imx25_ccm_get_mcu_clk() 150 / (1 + EXTRACT(s->reg[IMX25_CCM_CCTL_REG], AHB_CLK_DIV)); in imx25_ccm_get_ahb_clk() 200 memset(s->reg, 0, IMX25_CCM_MAX_REG * sizeof(uint32_t)); in imx25_ccm_reset() [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | fsl,imx-sdma.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/dma/fsl,imx-sdma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Joy Zou <joy.zou@nxp.com> 13 - $ref: dma-controller.yaml# 18 - items: 19 - enum: 20 - fsl,imx50-sdma 21 - fsl,imx51-sdma [all …]
|
/openbmc/qemu/include/hw/timer/ |
H A D | imx_gpt.h | 8 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net> 78 #define TYPE_IMX25_GPT "imx25.gpt" 97 IMXCCMState *ccm; member
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | imx53.dtsi | 10 * http://www.opensource.org/licenses/gpl-license.html 15 #include "imx53-pinfunc.h" 16 #include <dt-bindings/clock/imx5-clock.h> 17 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/input/input.h> 19 #include <dt-bindings/interrupt-controller/irq.h> 38 tzic: tz-interrupt-controller@fffc000 { 39 compatible = "fsl,imx53-tzic", "fsl,tzic"; 40 interrupt-controller; 41 #interrupt-cells = <1>; [all …]
|
H A D | imx6sl.dtsi | 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include "imx6sl-pinfunc.h" 12 #include <dt-bindings/clock/imx6sl-clock.h> 15 #address-cells = <1>; 16 #size-cells = <1>; 19 * pre-existing /chosen node to be available to insert the 21 * Also for U-Boot there must be a pre-existing /memory node. 47 #address-cells = <1>; 48 #size-cells = <0>; 51 compatible = "arm,cortex-a9"; [all …]
|
/openbmc/qemu/include/hw/arm/ |
H A D | fsl-imx25.h | 4 * Copyright (C) 2015 Jean-Christophe Dubois <jcd@tribudubois.net> 36 #define TYPE_FSL_IMX25 "fsl-imx25" 54 IMX25CCMState ccm; member 89 * 0x43F8_0000 0x43F8_3FFF 16 Kbytes I2C-1 90 * 0x43F8_4000 0x43F8_7FFF 16 Kbytes I2C-3 91 * 0x43F8_8000 0x43F8_BFFF 16 Kbytes CAN-1 92 * 0x43F8_C000 0x43F8_FFFF 16 Kbytes CAN-2 93 * 0x43F9_0000 0x43F9_3FFF 16 Kbytes UART-1 94 * 0x43F9_4000 0x43F9_7FFF 16 Kbytes UART-2 95 * 0x43F9_8000 0x43F9_BFFF 16 Kbytes I2C-2 [all …]
|
/openbmc/linux/arch/arm/mach-imx/ |
H A D | avic.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 19 #include "irq-common.h" 29 #define AVIC_NIPRIORITY(x) (0x20 + 4 * (7 - (x))) /* int priority */ 57 return -EINVAL; in avic_set_irq_fiq() 63 hwirq -= AVIC_NUM_IRQS / 2; in avic_set_irq_fiq() 85 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend() 86 int idx = d->hwirq >> 5; in avic_irq_suspend() 88 avic_saved_mask_reg[idx] = imx_readl(avic_base + ct->regs.mask); in avic_irq_suspend() 89 imx_writel(gc->wake_active, avic_base + ct->regs.mask); in avic_irq_suspend() [all …]
|
/openbmc/u-boot/arch/arm/include/asm/arch-mx25/ |
H A D | imx-regs.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 6 * Based on arch-mx31/imx-regs.h 9 * and arch-mx27/imx-regs.h 22 /* Clock Control Module (CCM) registers */ 31 u32 rcsr; /* CCM Status */ 32 u32 crdr; /* CCM Reset and Debug */ 73 u32 cmp[3]; /* output compare 1-3 */ 74 u32 capt[2]; /* input capture 1-2 */ 125 /* Multi-Layer AHB Crossbar Switch (MAX) registers */ 158 /* AHB <-> IP-Bus Interface (AIPS) */ [all …]
|
/openbmc/linux/ |
H A D | opengrok1.0.log | 1 2024-12-28 20:07:11.902-0600 FINER t583 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' 2 2024-12-28 20:07:11.913-0600 FINEST t583 Statistics.logIt: Added: '/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c' (CAnalyzer) (took 116 ms) 3 2024-12-28 20:07:11.899-0600 FINER t593 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/linux',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/linux/tools/testing/selftests/powerpc/tm/tm-signa [all...] |
H A D | opengrok0.0.log | 1 2024-12-28 20:09:05.996-0600 FINEST t1171 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/linux/drivers/staging/media/av7110/video-continue.rst.gz' 2 2024-12-28 20:09:05.942-0600 FINEST t1149 PendingFileCompleter.doRename: Moved pending as file: '/opengrok/data/xref/openbmc/u-boot/arch/sh/config.mk.gz' 3 2024-12-2 [all...] |
H A D | opengrok2.0.log | 1 2024-12-28 20:05:26.116-0600 FINEST t586 Statistics.logIt: Added: '/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/rtnetlink.sh' (ShAnalyzer) (took 79 ms) 2 2024-12-28 20:05:26.112-0600 FINER t592 IndexDatabase.createAnnotationCache: failed to create annotation: repository {dir='/opengrok/src/openbmc/qemu',type=git,historyCache=on,renamed=false,merge=true,annotationCache=off} does not allow to create annotation cache for '/opengrok/src/openbmc/qemu/chardev/spice.c' 3 2024-12-28 20:05:26.116-0600 FINEST t592 Statistics.logIt: Added: '/openbmc/qemu/chardev/spice.c' (CAnalyzer) (took 33 ms) 4 2024-1 [all...] |