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/openbmc/linux/drivers/i2c/muxes/
H A Di2c-arb-gpio-challenge.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
11 #include <linux/i2c.h>
12 #include <linux/i2c-mux.h>
19 * struct i2c_arbitrator_data - Driver data for I2C arbitrator
38 * i2c_arbitrator_select - claim the I2C bus
40 * Use the GPIO-based signalling protocol; return -EBUSY if we fail.
44 const struct i2c_arbitrator_data *arb = i2c_mux_priv(muxc); in i2c_arbitrator_select() local
48 stop_time = jiffies + usecs_to_jiffies(arb->wait_free_us) + 1; in i2c_arbitrator_select()
51 gpiod_set_value(arb->our_gpio, 1); in i2c_arbitrator_select()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for multiplexer I2C chip drivers.
5 obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
7 obj-$(CONFIG_I2C_DEMUX_PINCTRL) += i2c-demux-pinctrl.o
9 obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o
10 obj-$(CONFIG_I2C_MUX_GPMUX) += i2c-mux-gpmux.o
11 obj-$(CONFIG_I2C_MUX_LTC4306) += i2c-mux-ltc4306.o
12 obj-$(CONFIG_I2C_MUX_MLXCPLD) += i2c-mux-mlxcpld.o
13 obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o
14 obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # Multiplexer I2C chip drivers configuration
6 menu "Multiplexer I2C Chip support"
10 tristate "GPIO-based I2C arbitration"
15 I2C multimaster arbitration scheme using GPIOs and a challenge &
20 will be called i2c-arb-gpio-challenge.
23 tristate "GPIO-based I2C multiplexer"
27 GPIO based I2C multiplexer. This driver provides access to
28 I2C busses connected through a MUX, which is controlled
32 will be called i2c-mux-gpio.
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/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-arb-gpio-challenge.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-arb-gpio-challenge.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
10 - Doug Anderson <dianders@chromium.org>
11 - Peter Rosin <peda@axentia.se>
15 the master of an I2C bus in a multimaster situation.
18 standard I2C multi-master rules. Using GPIOs is generally useful in the case
23 * It is nonstandard (not using standard I2C multimaster)
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H A Dnxp,pca9541.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nxp,pca9541.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP PCA9541 I2C bus master selector
10 - Peter Rosin <peda@axentia.se>
19 i2c-arb:
21 $ref: /schemas/i2c/i2c-controller.yaml
24 I2C arbitration bus node.
27 - compatible
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H A Di2c-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek I2C controller
10 This driver interfaces with the native I2C controller present in
14 - $ref: /schemas/i2c/i2c-controller.yaml#
17 - Qii Wang <qii.wang@mediatek.com>
22 - const: mediatek,mt2712-i2c
23 - const: mediatek,mt6577-i2c
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/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-delta-ahe50dc.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g4.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "regulator-output"; \
10 vout-supply = <&efuse##n>; \
19 shunt-resistor-micro-ohms = <675>; \
22 regulator-name = __stringify(efuse##num##-reg); \
28 model = "Delta Power AHE-50DC";
29 compatible = "delta,ahe50dc-bmc", "aspeed,ast2400";
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/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm7125.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
42 cpu_intc: interrupt-controller {
43 #address-cells = <0>;
44 compatible = "mti,cpu-interrupt-controller";
46 interrupt-controller;
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H A Dbcm7425.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7360.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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H A Dbcm7420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7346.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <163125000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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H A Dbcm7358.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <375000000>;
24 cpu_intc: interrupt-controller {
25 #address-cells = <0>;
26 compatible = "mti,cpu-interrupt-controller";
28 interrupt-controller;
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt6797.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/clock/mt6797-clk.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/mt6797-pinfunc.h>
14 interrupt-parent = <&sysirq>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <1>;
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/openbmc/u-boot/drivers/i2c/muxes/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0+
4 obj-$(CONFIG_I2C_ARB_GPIO_CHALLENGE) += i2c-arb-gpio-challenge.o
5 obj-$(CONFIG_$(SPL_)I2C_MUX) += i2c-mux-uclass.o
6 obj-$(CONFIG_I2C_MUX_PCA954x) += pca954x.o
7 obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o
H A Di2c-arb-gpio-challenge.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <i2c.h>
29 debug("%s: %s\n", __func__, mux->name); in i2c_arbitrator_deselect()
30 ret = dm_gpio_set_value(&priv->ap_claim, 0); in i2c_arbitrator_deselect()
31 udelay(priv->slew_delay_us); in i2c_arbitrator_deselect()
43 debug("%s: %s\n", __func__, mux->name); in i2c_arbitrator_select()
51 ret = dm_gpio_set_value(&priv->ap_claim, 1); in i2c_arbitrator_select()
54 udelay(priv->slew_delay_us); in i2c_arbitrator_select()
58 while (get_timer(start_retry) < priv->wait_retry_ms) { in i2c_arbitrator_select()
59 ret = dm_gpio_get_value(&priv->ec_claim); in i2c_arbitrator_select()
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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
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/openbmc/openbmc/meta-ingrasys/meta-zaius/recipes-phosphor/sensors/
H A Dphosphor-hwmon_%.bbappend3 ZAIUS_CHIPS = "bus@1e78a000/i2c@40/ucd90160@64"
4 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/pca9541a@70/i2c-arb/hotswap@54"
5 ZAIUS_CHIPS += " pwm-tacho-controller@1e786000"
6 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/power-brick@30"
7 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/power-brick@6a"
8 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/vrm@40"
9 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/vrm@41"
10 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/vrm@43"
11 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/vrm@60"
12 ZAIUS_CHIPS += " bus@1e78a000/i2c@300/vrm@64"
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/openbmc/u-boot/arch/arm/dts/
H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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/openbmc/u-boot/doc/
H A DREADME.i2c1 I2C Bus Arbitration
4 While I2C supports multi-master buses this is difficult to get right.
6 Clock-stretching and the arbitrary time that an I2C transaction can take
8 When one or more masters can be reset independently part-way through a
11 U-Boot provides a scheme based on two 'claim' GPIOs, one driven by the
18 Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO,
22 The driver is implemented as an I2C mux, as it is in Linux. See
23 i2c-arb-gpio-challenge for the implementation.
28 - AP_CLAIM: output from AP, signalling to the EC that the AP wants the bus
29 - EC_CLAIM: output from EC, signalling to the AP that the EC wants the bus
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/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clkc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/gpio/meson-axg-gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
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/openbmc/linux/drivers/i2c/busses/
H A Di2c-iop3xx.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* ------------------------------------------------------------------------- */
3 /* i2c-iop3xx.h algorithm driver definitions private to i2c-iop3xx.c */
4 /* ------------------------------------------------------------------------- */
5 /* Copyright (C) 2003 Peter Milne, D-TACQ Solutions Ltd
9 /* ------------------------------------------------------------------------- */
21 #define IOP3XX_ICR_ALD_IE 0x1000 /* 1=Arb Loss Detect Interrupt Enable */
29 * when sending a master mode general call message from the I2C unit"
33 * "NOTE: To avoid I2C bus integrity problems,
34 * the user needs to ensure that the GPIO Output Data Register -
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H A Di2c-altera.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on the i2c-axxia.c driver.
10 #include <linux/i2c.h>
30 #define ALTR_I2C_ISER_ARB_EN BIT(3) /* Enable ARB LOST IRQ */
36 #define ALTR_I2C_ISR_ARB BIT(3) /* ARB LOST IRQ */
58 * struct altr_i2c_dev - I2C device context
65 * @adapter: core i2c abstraction
66 * @i2c_clk: clock reference for i2c input clock
67 * @bus_clk_rate: current i2c bus clock rate
96 int_en = readl(idev->base + ALTR_I2C_ISER); in altr_i2c_int_enable()
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