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/openbmc/linux/security/selinux/ss/
H A Dconstraint.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * beyond the type-based rules in `te' or the role-based
36 #define CEXPR_L1L2 32 /* low level 1 vs. low level 2 */
37 #define CEXPR_L1H2 64 /* low level 1 vs. high level 2 */
38 #define CEXPR_H1L2 128 /* high level 1 vs. low level 2 */
39 #define CEXPR_H1H2 256 /* high level 1 vs. high level 2 */
40 #define CEXPR_L1H1 512 /* low level 1 vs. high level 1 */
41 #define CEXPR_L2H2 1024 /* low level 2 vs. high level 2 */
/openbmc/linux/Documentation/userspace-api/media/dvb/
H A Dca_high_level.rst1 .. SPDX-License-Identifier: GPL-2.0
3 The High level CI API
10 This document describes the high level CI API as in accordance to the
14 With the High Level CI approach any new card with almost any random
33 .. code-block:: c
39 #define CA_CI 1 /* CI high level interface */
40 #define CA_CI_LINK 2 /* CI link layer level interface */
41 #define CA_CI_PHYS 4 /* CI physical layer level interface */
42 #define CA_DESCR 8 /* built-in descrambler */
50 This CI interface follows the CI high level interface, which is not
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/openbmc/linux/Documentation/driver-api/media/drivers/
H A Dpvrusb2.rst1 .. SPDX-License-Identifier: GPL-2.0
9 ----------
13 Its history started with the reverse-engineering effort by Björn
29 1. Low level wire-protocol implementation with the device.
34 3. High level hardware driver implementation which coordinates all
38 tear-down, arbitration, and interaction with high level
42 5. High level interfaces which glue the driver to various published
54 right now the V4L high level interface is the most complete, the
55 sysfs high level interface will work equally well for similar
57 possible to produce a DVB high level interface that can sit right
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/openbmc/linux/Documentation/admin-guide/pm/
H A Dintel-speed-select.rst1 .. SPDX-License-Identifier: GPL-2.0
14 - https://www.intel.com/content/www/us/en/architecture-and-technology/speed-select-technology-artic…
15 - https://builders.intel.com/docs/networkbuilders/intel-speed-select-technology-base-frequency-enha…
19 dynamically without pre-configuring via BIOS setup options. This dynamic
29 intel-speed-select configuration tool
32 Most Linux distribution packages may include the "intel-speed-select" tool. If not,
38 # cd tools/power/x86/intel-speed-select/
43 ------------
47 # intel-speed-select --help
49 The top-level help describes arguments and features. Notice that there is a
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/openbmc/qemu/hw/intc/
H A Daspeed_vic.c9 * the COPYING file in the top-level directory.
16 * The hardware uses 32bit registers to manage 51 IRQs, with low and high
18 * uses 64bit data types to store both low and high register values (in the one
27 * read-modify-write sequence).
47 uint64_t new = (s->raw & s->enable); in aspeed_vic_update()
50 flags = new & s->select; in aspeed_vic_update()
52 qemu_set_irq(s->fiq, !!flags); in aspeed_vic_update()
54 flags = new & ~s->select; in aspeed_vic_update()
56 qemu_set_irq(s->irq, !!flags); in aspeed_vic_update()
59 static void aspeed_vic_set_irq(void *opaque, int irq, int level) in aspeed_vic_set_irq() argument
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/openbmc/linux/include/media/
H A Dcec-pin.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin.h - low-level CEC pin control
15 * struct cec_pin_ops - low-level CEC pin operations
16 * @read: read the CEC pin. Returns > 0 if high, 0 if low, or an error
19 * @high: stop driving the CEC pin. The pull-up will drive the pin
20 * high, unless someone else is driving the pin low.
26 * @read_hpd: optional. Read the HPD pin. Returns > 0 if high, 0 if low or
28 * @read_5v: optional. Read the 5V pin. Returns > 0 if high, 0 if low or
30 * @received: optional. High-level CEC message callback. Allows the driver
39 void (*high)(struct cec_adapter *adap); member
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/openbmc/linux/drivers/gpu/drm/panfrost/
H A Dpanfrost_regs.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved.
12 #define GPU_L2_FEATURES 0x004 /* (RO) Level 2 cache features */
88 #define GPU_SHADER_PRESENT_HI 0x104 /* (RO) Shader core present bitmap, high word */
90 #define GPU_TILER_PRESENT_HI 0x114 /* (RO) Tiler core present bitmap, high word */
92 #define GPU_L2_PRESENT_LO 0x120 /* (RO) Level 2 cache present bitmap, low word */
93 #define GPU_L2_PRESENT_HI 0x124 /* (RO) Level 2 cache present bitmap, high word */
100 #define GPU_STACK_PRESENT_HI 0xE04 /* (RO) Core stack present bitmap, high word */
103 #define SHADER_READY_HI 0x144 /* (RO) Shader core ready bitmap, high word */
106 #define TILER_READY_HI 0x154 /* (RO) Tiler core ready bitmap, high word */
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/openbmc/linux/drivers/iio/adc/
H A Denvelope-detector.c1 // SPDX-License-Identifier: GPL-2.0
11 * The DAC is used to find the peak level of an alternating voltage input
16 * input +------>-------|+ \
18 * .-------. | }---.
20 * | dac|-->--|- / |
24 * | irq|------<-------'
26 * '-------'
62 int high; member
63 int level; member
72 * (one-bit memory) for if the interrupt has triggered since last calling
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/openbmc/linux/Documentation/core-api/
H A Dgenericirq.rst7 :Copyright: |copy| 2005-2010: Thomas Gleixner
8 :Copyright: |copy| 2005-2006: Ingo Molnar
29 __do_IRQ() super-handler, which is able to deal with every type of
36 - Level type
38 - Edge type
40 - Simple type
44 - Fast EOI type
46 In the SMP world of the __do_IRQ() super-handler another type was
49 - Per CPU type
51 This split implementation of high-level IRQ handlers allows us to
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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-counter3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
16 MTCLKA-MTCLKB:
20 MTCLKC-MTCLKD:
26 Contact: linux-iio@vger.kernel.org
33 Contact: linux-iio@vger.kernel.org
39 Contact: linux-iio@vger.kernel.org
45 Contact: linux-iio@vger.kernel.org
52 Contact: linux-iio@vger.kernel.org
59 Contact: linux-iio@vger.kernel.org
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/openbmc/qemu/include/hw/gpio/
H A Dnrf51_gpio.h2 * nRF51 System-on-Chip general purpose input/output register definition
6 * + Unnamed GPIO inputs 0-31: Set tri-state input level for GPIO pin.
7 * Level -1: Externally Disconnected/Floating; Pull-up/down will be regarded
8 * Level 0: Input externally driven LOW
9 * Level 1: Input externally driven HIGH
10 * + Unnamed GPIO outputs 0-31:
11 * Level -1: Disconnected/Floating
12 * Level 0: Driven LOW
13 * Level 1: Driven HIGH
16 * + The nRF51 GPIO output driver supports two modes, standard and high-current
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/openbmc/u-boot/arch/arm/dts/
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 /* DRAM space - 1, size : 2 GB DRAM */
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <100000000>;
25 clock-output-names = "sysclk";
29 compatible = "fsl,ls2080a-clockgen";
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/openbmc/pldm/platform-mc/
H A Devent_manager.cpp8 #include <phosphor-logging/lg2.hpp>
34 /* EventClass sensorEvent `Table 11 - PLDM Event Types` DSP0248 */ in handlePlatformEvent()
55 size_t sensorDataLength = eventDataSize - eventClassDataOffset; in handlePlatformEvent()
70 /* EventClass CPEREvent as `Table 11 - PLDM Event Types` DSP0248 V1.3.0 */ in handlePlatformEvent()
76 /* EventClass pldmMessagePollEvent `Table 11 - PLDM Event Types` DSP0248 */ in handlePlatformEvent()
95 auto& terminus = it->second; // Reference for clarity in handlePlatformEvent()
96 terminus->pollEvent = true; in handlePlatformEvent()
97 terminus->pollEventId = poll_event.event_id; in handlePlatformEvent()
98 terminus->pollDataTransferHandle = poll_event.data_transfer_handle; in handlePlatformEvent()
143 auto sensor = terminus->getSensorObject(sensorId); in processNumericSensorEvent()
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/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst16 - The descriptor-based interface is the preferred way to manipulate GPIOs,
18 - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48 - Output values are writable (high=1, low=0). Some chips also have
50 value might be driven, supporting "wire-OR" and similar schemes for the
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/openbmc/linux/drivers/soc/fsl/qbman/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
26 Compiles in additional checks, to sanity-check the drivers and
30 tristate "BMan self-tests"
32 Compile the BMan self-test code. These tests will
37 bool "High-level API self-test"
41 This requires the presence of cpu-affine portals, and performs
42 high-level API testing with them (whichever portal(s) are affine
46 tristate "QMan self-tests"
48 Compile self-test code for QMan.
51 bool "QMan high-level self-test"
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/openbmc/dbus-sensors/src/
H A DThresholds.cpp32 Level findThresholdLevel(uint8_t sev) in findThresholdLevel()
38 return prop.level; in findThresholdLevel()
41 return Level::ERROR; in findThresholdLevel()
48 return Direction::HIGH; in findThresholdDirection()
75 if (std::visit(VariantToStringVisitor(), labelFind->second) != in parseThresholdsFromConfig()
93 (std::visit(VariantToIntVisitor(), indexFind->second) != in parseThresholdsFromConfig()
105 std::visit(VariantToDoubleVisitor(), hysteresisFind->second); in parseThresholdsFromConfig()
119 std::visit(VariantToUnsignedIntVisitor(), severityFind->second); in parseThresholdsFromConfig()
122 std::visit(VariantToStringVisitor(), directionFind->second); in parseThresholdsFromConfig()
124 Level level = findThresholdLevel(severity); in parseThresholdsFromConfig() local
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/openbmc/u-boot/arch/m68k/include/asm/coldfire/
H A Dintctrl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
20 u32 iprh0; /* 0x00 Pending High */
22 u32 imrh0; /* 0x08 Mask High */
24 u32 frch0; /* 0x10 Force High */
29 u16 res1[19]; /* 0x1a - 0x3c */
31 u16 res1; /* 0x18 - 0x19 */
35 u8 clmask0; /* 0x1E Current Level Mask */
36 u8 slmask; /* 0x1F Saved Level Mask */
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsnps,archs-idu-intc.txt1 * ARC-HS Interrupt Distribution Unit
3 This optional 2nd level interrupt controller can be used in SMP configurations
9 - compatible: "snps,archs-idu-intc"
10 - interrupt-controller: This is an interrupt controller.
11 - #interrupt-cells: Must be <1> or <2>.
18 - bits[3:0] trigger type and level flags
19 1 = low-to-high edge triggered
20 2 = NOT SUPPORTED (high-to-low edge triggered)
21 4 = active high level-sensitive <<< DEFAULT
22 8 = NOT SUPPORTED (active low level-sensitive)
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H A Datmel,aic.txt4 - compatible: Should be:
5 - "atmel,<chip>-aic" where <chip> can be "at91rm9200", "sama5d2",
7 - "microchip,<chip>-aic" where <chip> can be "sam9x60"
9 - interrupt-controller: Identifies the node as an interrupt controller.
10 - #interrupt-cells: The number of cells to define the interrupts. It should be 3.
13 bits[3:0] trigger type and level flags:
14 1 = low-to-high edge triggered.
15 2 = high-to-low edge triggered.
16 4 = active high level-sensitive.
17 8 = active low level-sensitive.
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H A Dimg,pdc-intc.txt10 - compatible: Specifies the compatibility list for the interrupt controller.
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
14 addressable register space. The type shall be <prop-encoded-array>.
16 - interrupt-controller: The presence of this property identifies the node
19 - #interrupt-cells: Specifies the number of cells needed to encode an
22 - num-perips: Number of waking peripherals.
24 - num-syswakes: Number of SysWake inputs.
26 - interrupts: List of interrupt specifiers. The first specifier shall be the
34 - <1st-cell>: The interrupt-number that identifies the interrupt source.
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/openbmc/docs/architecture/code-update/
H A Dcode-update-diagrams.md3 1. [High-Level Overview](#High-Level Overview)
5 ## High-Level Overview
24 │ │Software D-Bus │
33 │ D-Bus Object │
61 - [1]
62 …[Software D-Bus Object](https://github.com/openbmc/phosphor-dbus-interfaces/tree/master/yaml/xyz/o…
63 - [*] In a static layout configuration, the images are stored in RAM and the
66 …[initrdscripts](https://github.com/openbmc/openbmc/tree/master/meta-phosphor/recipes-phosphor/init…
/openbmc/u-boot/fs/btrfs/
H A Dctree.c1 // SPDX-License-Identifier: GPL-2.0+
3 * BTRFS filesystem implementation for U-Boot
14 if (a->objectid > b->objectid) in btrfs_comp_keys()
16 if (a->objectid < b->objectid) in btrfs_comp_keys()
17 return -1; in btrfs_comp_keys()
18 if (a->type > b->type) in btrfs_comp_keys()
20 if (a->type < b->type) in btrfs_comp_keys()
21 return -1; in btrfs_comp_keys()
22 if (a->offset > b->offset) in btrfs_comp_keys()
24 if (a->offset < b->offset) in btrfs_comp_keys()
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/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dlinux,wdt-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/linux,wdt-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: GPIO-controlled Watchdog
10 - Guenter Roeck <linux@roeck-us.net>
11 - Robert Marko <robert.marko@sartura.hr>
15 const: linux,wdt-gpio
24 - description:
25 Either a high-to-low or a low-to-high transition clears the WDT counter.
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/openbmc/smbios-mdr/tools/
H A Dsst-compare-redfish-os.py13 # * intel-speed-select tool from the kernel source tree
14 # (tools/power/x86/intel-speed-select), and available in the PATH.
29 # For TPMI-based CPUs, we only care about powerdomain-0
32 match = re.search("powerdomain-(\\d+)", proc)
41 "intel-speed-select",
42 "--debug",
43 "--format=json",
44 "perf-profile",
64 "intel-speed-select",
65 "--format=json",
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/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio-nmk.txt4 - compatible : Should be "st,nomadik-gpio".
5 - reg : Physical base address and length of the controller's registers.
6 - interrupts : The interrupt outputs from the controller.
7 - #gpio-cells : Should be two:
10 - bits[3:0] trigger type and level flags:
11 1 = low-to-high edge triggered.
12 2 = high-to-low edge triggered.
13 4 = active high level-sensitive.
14 8 = active low level-sensitive.
15 - gpio-controller : Marks the device node as a GPIO controller.
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