1e9a0caa3SBoris BREZILLON* Advanced Interrupt Controller (AIC)
2e9a0caa3SBoris BREZILLON
3e9a0caa3SBoris BREZILLONRequired properties:
4212fbf2cSSandeep Sheriker Mallikarjun- compatible: Should be:
5212fbf2cSSandeep Sheriker Mallikarjun    - "atmel,<chip>-aic" where  <chip> can be "at91rm9200", "sama5d2",
6212fbf2cSSandeep Sheriker Mallikarjun      "sama5d3" or "sama5d4"
7212fbf2cSSandeep Sheriker Mallikarjun    - "microchip,<chip>-aic" where <chip> can be "sam9x60"
8212fbf2cSSandeep Sheriker Mallikarjun
9e9a0caa3SBoris BREZILLON- interrupt-controller: Identifies the node as an interrupt controller.
10e9a0caa3SBoris BREZILLON- #interrupt-cells: The number of cells to define the interrupts. It should be 3.
11e9a0caa3SBoris BREZILLON  The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet).
12e9a0caa3SBoris BREZILLON  The second cell is used to specify flags:
13e9a0caa3SBoris BREZILLON    bits[3:0] trigger type and level flags:
14e9a0caa3SBoris BREZILLON      1 = low-to-high edge triggered.
15e9a0caa3SBoris BREZILLON      2 = high-to-low edge triggered.
16e9a0caa3SBoris BREZILLON      4 = active high level-sensitive.
17e9a0caa3SBoris BREZILLON      8 = active low level-sensitive.
18e9a0caa3SBoris BREZILLON      Valid combinations are 1, 2, 3, 4, 8.
19e9a0caa3SBoris BREZILLON      Default flag for internal sources should be set to 4 (active high).
20e9a0caa3SBoris BREZILLON  The third cell is used to specify the irq priority from 0 (lowest) to 7
21e9a0caa3SBoris BREZILLON  (highest).
22e9a0caa3SBoris BREZILLON- reg: Should contain AIC registers location and length
23e9a0caa3SBoris BREZILLON- atmel,external-irqs: u32 array of external irqs.
24e9a0caa3SBoris BREZILLON
25e9a0caa3SBoris BREZILLONExamples:
26e9a0caa3SBoris BREZILLON	/*
27e9a0caa3SBoris BREZILLON	 * AIC
28e9a0caa3SBoris BREZILLON	 */
29e9a0caa3SBoris BREZILLON	aic: interrupt-controller@fffff000 {
30e9a0caa3SBoris BREZILLON		compatible = "atmel,at91rm9200-aic";
31e9a0caa3SBoris BREZILLON		interrupt-controller;
32e9a0caa3SBoris BREZILLON		#interrupt-cells = <3>;
33e9a0caa3SBoris BREZILLON		reg = <0xfffff000 0x200>;
34e9a0caa3SBoris BREZILLON	};
35e9a0caa3SBoris BREZILLON
36e9a0caa3SBoris BREZILLON	/*
37e9a0caa3SBoris BREZILLON	 * An interrupt generating device that is wired to an AIC.
38e9a0caa3SBoris BREZILLON	 */
39e9a0caa3SBoris BREZILLON	dma: dma-controller@ffffec00 {
40e9a0caa3SBoris BREZILLON		compatible = "atmel,at91sam9g45-dma";
41e9a0caa3SBoris BREZILLON		reg = <0xffffec00 0x200>;
42e9a0caa3SBoris BREZILLON		interrupts = <21 4 5>;
43e9a0caa3SBoris BREZILLON	};
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