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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dfsl,ssi.txt4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
[all …]
/openbmc/linux/arch/mips/kvm/
H A Dvz.c115 if (kvm_mips_guest_has_msa(&vcpu->arch)) in kvm_vz_config5_guest_wrmask()
122 if (kvm_mips_guest_has_fpu(&vcpu->arch)) { in kvm_vz_config5_guest_wrmask()
140 * Config1: M, [MMUSize-1, C2, MD, PC, WR, CA], FP
158 if (kvm_mips_guest_can_have_fpu(&vcpu->arch)) in kvm_vz_config1_user_wrmask()
175 if (kvm_mips_guest_can_have_msa(&vcpu->arch)) in kvm_vz_config3_user_wrmask()
205 set_bit(priority, &vcpu->arch.pending_exceptions); in kvm_vz_queue_irq()
206 clear_bit(priority, &vcpu->arch.pending_exceptions_clr); in kvm_vz_queue_irq()
211 clear_bit(priority, &vcpu->arch.pending_exceptions); in kvm_vz_dequeue_irq()
212 set_bit(priority, &vcpu->arch.pending_exceptions_clr); in kvm_vz_dequeue_irq()
236 int intr = (int)irq->irq; in kvm_vz_queue_io_int_cb()
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/openbmc/u-boot/arch/arm/dts/
H A Ddra76x.dtsi2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
16 /* MCAN interrupts are hard-wired to irqs 67, 68 */
18 ti,irqs-skip = <10 67 68 133 139 140>;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra74x-p.dtsi2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
16 compatible = "ti,emif-dra7xx";
24 /* MCAN interrupts are hard-wired to irqs 67, 68 */
26 ti,irqs-skip = <10 67 68 133 139 140>;
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dusb-hcd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-hcd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: usb.yaml#
20 tpl-support:
23 targeted hosts (non-PC hosts).
26 "#address-cells":
29 "#size-cells":
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H A Dusb-device.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-device.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 Usually, we only use device tree for hard wired USB device.
15 http://www.devicetree.org/open-firmware/bindings/usb/usb-1_0.ps
17 Four types of device-tree nodes are defined: "host-controller nodes"
31 pattern: "^usb[0-9a-f]{1,4},[0-9a-f]{1,4}$"
41 description: the number of the USB hub port or the USB host-controller
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H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: usb-xhci.yaml
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/openbmc/linux/include/linux/platform_data/
H A Dad7266.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * enum ad7266_range - AD7266 reference voltage range
13 * @AD7266_RANGE_VREF: Device is configured for input range 0V - VREF
15 * @AD7266_RANGE_2VREF: Device is configured for input range 0V - 2VREF
24 * enum ad7266_mode - AD7266 sample mode
29 * @AD7266_MODE_SINGLE_ENDED: Device is configured for single-ended mode
39 * struct ad7266_platform_data - Platform data for the AD7266 driver
42 * @fixed_addr: Whether the address pins are hard-wired
/openbmc/linux/Documentation/hwmon/
H A Dvt1211.rst10 Addresses scanned: none, address read from Super-I/O config space
24 -----------------
29 configuration for channels 1-5.
30 Legal values are in the range of 0-31. Bit 0 maps to
47 -----------
49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring
52 implements 5 universal input channels (UCH1-5) that can be individually
60 connected to the PWM outputs of the VT1211 :-().
80 ------------------
82 Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input
[all …]
H A Ddme1737.rst18 Addresses scanned: none, address read from Super-I/O config space
34 Addresses scanned: none, address read from Super-I/O config space
43 -----------------
52 Include non-standard LPC addresses 0x162e and 0x164e
55 - VIA EPIA SN18000
59 -----------
63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors
64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and
65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement
66 up to 5 PWM outputs pwm[1-3,5-6] for controlling fan speeds both manually and
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dasix,ax88178.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 Device tree properties for hard wired USB Ethernet devices.
16 - $ref: ethernet-controller.yaml#
21 - enum:
22 - usbb95,1720 # ASIX AX88172
23 - usbb95,172a # ASIX AX88172A
24 - usbb95,1780 # ASIX AX88178
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H A Dmicrochip,lan95xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 Device tree properties for hard wired SMSC95xx compatible USB Ethernet
17 - $ref: ethernet-controller.yaml#
22 - enum:
23 - usb424,9500 # SMSC9500 USB Ethernet Device
24 - usb424,9505 # SMSC9505 USB Ethernet Device
25 - usb424,9530 # SMSC LAN9530 USB Ethernet Device
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/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dqcom,pm8058-led.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/qcom,pm8058-led.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 hard-wired usecase.
19 Hardware-wise the different LEDs support slightly different output currents.
24 - $ref: common.yaml#
29 - qcom,pm8058-led
30 - qcom,pm8058-keypad-led
[all …]
/openbmc/u-boot/drivers/board/
H A Dgazerbeam.c1 // SPDX-License-Identifier: GPL-2.0+
29 * struct board_gazerbeam_priv - Private data structure for the gazerbeam board
48 * _read_board_variant_data() - Read variant information from the hardware.
52 * The data read from the board's hardware (mostly hard-wired GPIOs) is stored
56 * Return: 0 if OK, -ve on error.
71 dev->name, I2C_BUS_SEQ_NO, res); in _read_board_variant_data()
77 dev->name, I2C_BUS_SEQ_NO); in _read_board_variant_data()
78 return -EIO; in _read_board_variant_data()
86 dev->name); in _read_board_variant_data()
87 return -EINVAL; in _read_board_variant_data()
[all …]
/openbmc/linux/drivers/sh/intc/
H A Dirqdomain.c18 * intc_irq_domain_evt_xlate() - Generic xlate for vectored IRQs.
32 return -EINVAL; in intc_evt_xlate()
52 irq_base = evt2irq(hw->vectors[0].vect); in intc_irq_domain_init()
53 irq_end = evt2irq(hw->vectors[hw->nr_vectors - 1].vect); in intc_irq_domain_init()
56 * Linear domains have a hard-wired assertion that IRQs start at in intc_irq_domain_init()
59 * tree penalty for linear cases with non-zero hwirq bases. in intc_irq_domain_init()
61 if (irq_base == 0 && irq_end == (irq_base + hw->nr_vectors - 1)) in intc_irq_domain_init()
62 d->domain = irq_domain_add_linear(NULL, hw->nr_vectors, in intc_irq_domain_init()
65 d->domain = irq_domain_add_tree(NULL, &intc_evt_ops, NULL); in intc_irq_domain_init()
67 BUG_ON(!d->domain); in intc_irq_domain_init()
/openbmc/linux/drivers/clocksource/
H A Djcore-pit.c1 // SPDX-License-Identifier: GPL-2.0
3 * J-Core SoC PIT/clocksource driver
5 * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
64 writel(0, pit->base + REG_PITEN); in jcore_pit_disable()
71 writel(delta, pit->base + REG_THROT); in jcore_pit_set()
72 writel(pit->enable_val, pit->base + REG_PITEN); in jcore_pit_set()
94 return jcore_pit_set(pit->periodic_delta, pit); in jcore_pit_set_state_periodic()
110 pr_info("Local J-Core PIT init on cpu %u\n", cpu); in jcore_pit_local_init()
112 buspd = readl(pit->base + REG_BUSPD); in jcore_pit_local_init()
114 pit->periodic_delta = DIV_ROUND_CLOSEST(NSEC_PER_SEC, HZ * buspd); in jcore_pit_local_init()
[all …]
/openbmc/linux/arch/arm/mach-orion5x/
H A Dboard-mss2.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <asm/mach-types.h>
17 #include "bridge-regs.h"
32 * Check for devices with hard-wired IRQs. in mss2_pci_map_irq()
35 if (irq != -1) in mss2_pci_map_irq()
38 return -1; in mss2_pci_map_irq()
62 * - Userland modifies U-boot env to tell U-boot to go idle at next boot
63 * - The board reboots
64 * - U-boot starts and go into an idle mode until the user press "power"
84 /* register mss2 specific power-off method */ in mss2_init()
H A Dboard-rd88f5182.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-orion5x/rd88f5182-setup.c
5 * Marvell Orion-NAS Reference Design Setup
16 #include <asm/mach-types.h>
23 * RD-88F5182 Info
78 * Check for devices with hard-wired IRQs. in rd88f5182_pci_map_irq()
81 if (irq != -1) in rd88f5182_pci_map_irq()
87 switch (slot - RD88F5182_PCI_SLOT0_OFFS) { in rd88f5182_pci_map_irq()
94 return -1; in rd88f5182_pci_map_irq()
108 if (of_machine_is_compatible("marvell,rd-88f5182-nas")) in rd88f5182_pci_init()
/openbmc/linux/drivers/gpio/
H A Dgpio-moxtet.c1 // SPDX-License-Identifier: GPL-2.0
39 if (chip->desc->in_mask & BIT(offset)) { in moxtet_gpio_get_value()
40 ret = moxtet_device_read(chip->dev); in moxtet_gpio_get_value()
41 } else if (chip->desc->out_mask & BIT(offset)) { in moxtet_gpio_get_value()
42 ret = moxtet_device_written(chip->dev); in moxtet_gpio_get_value()
46 return -EINVAL; in moxtet_gpio_get_value()
61 state = moxtet_device_written(chip->dev); in moxtet_gpio_set_value()
65 offset -= MOXTET_GPIO_INPUTS; in moxtet_gpio_set_value()
72 moxtet_device_write(chip->dev, state); in moxtet_gpio_set_value()
79 /* All lines are hard wired to be either input or output, not both. */ in moxtet_gpio_get_direction()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dvt1211.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * vt1211.c - driver for the VIA VT1211 Super-I/O chip integrated hardware
19 #include <linux/hwmon-sysfs.h>
20 #include <linux/hwmon-vid.h>
27 static int uch_config = -1;
31 static int int_mode = -1;
43 /* ---------------------------------------------------------------------
49 * -------- ------------ --------- --------------------------
59 * --------------------------------------------------------------------- */
61 /* Voltages (in) numbered 0-5 (ix) */
[all …]
/openbmc/u-boot/include/
H A Dboard.h1 /* SPDX-License-Identifier: GPL-2.0+ */
9 * board or a specific device such as hard-wired GPIOs on GPIO expanders,
10 * read-only data in flash ICs, or similar.
16 * If for example the board had a read-only serial number flash IC, we could
36 * detect() - Run the hardware info detection procedure for this
45 * Return: 0 if OK, -ve on error.
50 * get_bool() - Read a specific bool data value that describes the
56 * Return: 0 if OK, -ve on error.
61 * get_int() - Read a specific int data value that describes the
67 * Return: 0 if OK, -ve on error.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
44 recommended to use the two-cell approach.
48 include/dt-bindings/gpio/gpio.h whenever possible:
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_fdi_regs.h1 /* SPDX-License-Identifier: MIT */
48 /* ILK always use 400mV 0dB for voltage swing and pre-emphasis level.
50 /* SNB A-stepping */
55 /* SNB B-stepping */
63 #define FDI_DP_PORT_WIDTH(width) (((width) - 1) << FDI_DP_PORT_WIDTH_SHIFT)
80 /* FDI_RX, FDI_X is hard-wired to Transcoder_X */
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dfaraday,ftpci100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
21 The plain variant has 128MiB of non-prefetchable memory space, whereas the
27 and should point to respective interrupt in that controller in its interrupt-map.
29 The code which is the only documentation of how the Faraday PCI (the non-dual
34 interrupt-map-mask = <0xf800 0 0 7>;
35 interrupt-map =
54 - $ref: /schemas/pci/pci-bus.yaml#
[all …]
/openbmc/linux/Documentation/input/devices/
H A Dyealink.rst2 Driver documentation for yealink usb-p1k phones
10 - keyboard full support, yealink.ko / input event API
11 - LCD full support, yealink.ko / sysfs API
12 - LED full support, yealink.ko / sysfs API
13 - dialtone full support, yealink.ko / sysfs API
14 - ringtone full support, yealink.ko / sysfs API
15 - audio playback full support, snd_usb_audio.ko / alsa API
16 - audio record full support, snd_usb_audio.ko / alsa API
27 Physical USB-P1K button layout input events
75 Reduced capability 7 segment digit, when segments are hard wired together.
[all …]

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