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/openbmc/u-boot/board/bosch/shc/
H A Dmux.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
21 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */
22 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */
23 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */
24 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)}, /* UART0_RTS */
25 {-1},
29 {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART1_RXD */
30 {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)}, /* UART1_TXD */
31 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */
[all …]
/openbmc/qemu/tests/qtest/
H A Dstm32l4x5_gpio-test.c4 * Copyright (c) 2024 Arnaud Minier <arnaud.minier@telecom-paris.fr>
5 * Copyright (c) 2024 Inès Varhol <ines.varhol@telecom-paris.fr>
8 * See the COPYING file in the top-level directory.
12 #include "libqtest-single.h"
84 #define GPIO_ADDR_MASK (~(GPIO_SIZE - 1))
121 return (gpio_addr - GPIO_BASE_ADDR) / GPIO_SIZE; in get_gpio_id()
137 r = qtest_qmp(global_qtest, "{ 'execute': 'qom-set', 'arguments': " in disconnect_all_pins()
138 "{ 'path': %s, 'property': 'disconnected-pins', 'value': %d } }", in disconnect_all_pins()
151 r = qtest_qmp(global_qtest, "{ 'execute': 'qom-get', 'arguments':" in get_disconnected_pins()
152 " { 'path': %s, 'property': 'disconnected-pins'} }", path); in get_disconnected_pins()
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/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_cyclone5_sr1500.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
32 u-boot,dm-pre-reloc;
38 phy-mode = "rgmii";
49 &gpio2 {
54 bank-name = "porta";
58 bank-name = "portb";
62 bank-name = "portc";
67 speed-mode = <0>;
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H A Dsocfpga_cyclone5_dbm_soc1.dts1 // SPDX-License-Identifier: GPL-2.0+
9 model = "Devboards.de DBM-SoC1";
10 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
29 u-boot,dm-pre-reloc;
35 phy-mode = "rgmii";
46 &gpio2 {
51 bank-name = "porta";
55 bank-name = "portb";
59 bank-name = "portc";
[all …]
H A Dsocfpga_cyclone5_de10_nano.dts1 // SPDX-License-Identifier: GPL-2.0+
11 model = "Terasic DE10-Nano";
12 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
31 u-boot,dm-pre-reloc;
37 phy-mode = "rgmii";
39 rxd0-skew-ps = <420>;
40 rxd1-skew-ps = <420>;
41 rxd2-skew-ps = <420>;
42 rxd3-skew-ps = <420>;
[all …]
H A Dsocfpga_cyclone5_de1_soc.dts1 // SPDX-License-Identifier: GPL-2.0+
9 model = "Terasic DE1-SoC";
10 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
29 u-boot,dm-pre-reloc;
35 phy-mode = "rgmii";
37 rxd0-skew-ps = <420>;
38 rxd1-skew-ps = <420>;
39 rxd2-skew-ps = <420>;
40 rxd3-skew-ps = <420>;
[all …]
H A Dimx6sx-sdb.dtsi9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
17 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
20 stdout-path = &uart1;
28 compatible = "pwm-backlight";
30 brightness-levels = <0 4 8 16 32 64 128 255>;
31 default-brightness-level = <6>;
34 gpio-keys {
35 compatible = "gpio-keys";
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H A Drk3128-evb.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "rockchip,rk3128-evb", "rockchip,rk3128";
15 stdout-path = &uart2;
18 vcc5v0_otg: vcc5v0-otg-drv {
19 compatible = "regulator-fixed";
20 regulator-name = "vcc5v0_otg";
22 pinctrl-names = "default";
23 pinctrl-0 = <&otg_vbus_drv>;
24 regulator-min-microvolt = <5000000>;
[all …]
H A Dr8a77990-ebisu.dts1 /* SPDX-License-Identifier: GPL-2.0 */
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
34 pinctrl-0 = <&avb_pins>;
35 pinctrl-names = "default";
36 renesas,no-ether-link;
37 phy-handle = <&phy0>;
38 phy-mode = "rgmii-txid";
41 phy0: ethernet-phy@0 {
[all …]
H A Dimx6sll-evk.dts9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
17 compatible = "fsl,imx6sll-evk", "fsl,imx6sll";
24 compatible = "pwm-backlight";
26 brightness-levels = <0 4 8 16 32 64 128 255>;
27 default-brightness-level = <6>;
32 compatible = "fsl,max8903-charger";
33 pinctrl-names = "default";
45 compatible = "fsl,imx6sl-pxp-v4l2";
[all …]
H A Dimx6ul-opos6ul.dtsi4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
52 reg = <0x80000000 0>; /* will be filled by U-Boot */
55 reg_3v3: regulator-3v3 {
56 compatible = "regulator-fixed";
57 regulator-name = "3V3";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
62 usdhc3_pwrseq: usdhc3-pwrseq {
63 compatible = "mmc-pwrseq-simple";
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H A Drk3368-sheep.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: gmac-clk {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "ext_gmac";
27 #clock-cells = <0>;
30 ir: ir-receiver {
[all …]
H A Dr8a7791-porter.dts1 // SPDX-License-Identifier: GPL-2.0
9 * SSI-AK4642
11 * JP3: 2-1: AK4642
12 * 2-3: ADV7511
19 /dts-v1/;
21 #include <dt-bindings/gpio/gpio.h>
35 stdout-path = "serial0:115200n8";
48 vcc_sdhi0: regulator-vcc-sdhi0 {
49 compatible = "regulator-fixed";
51 regulator-name = "SDHI0 Vcc";
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H A Dr8a7793-gose.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
9 * SSI-AK4643
36 /dts-v1/;
38 #include <dt-bindings/gpio/gpio.h>
39 #include <dt-bindings/input/input.h>
56 stdout-path = "serial0:115200n8";
64 gpio-keys {
65 compatible = "gpio-keys";
67 key-1 {
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H A Dimx6qdl-sabreauto.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
11 stdout-path = &uart4;
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_gpio_leds>;
29 gpio-keys {
30 compatible = "gpio-keys";
31 pinctrl-names = "default";
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H A Drk3288-phycore-rdk.dts2 * Device tree file for Phytec PCM-947 carrier board
6 * This file is dual-licensed: you can use it either under the terms
45 /dts-v1/;
47 #include <dt-bindings/input/input.h>
48 #include "rk3288-phycore-som.dtsi"
51 model = "Phytec RK3288 PCM-947";
52 compatible = "phytec,rk3288-pcm-947", "phytec,rk3288-phycore-som", "rockchip,rk3288";
55 stdout-path = &uart2;
59 u-boot,dm-pre-reloc;
60 u-boot,boot0 = &emmc;
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H A Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
27 regulator_3_3v: 3-3-v-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
[all …]
H A Drk3229-evb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
6 /dts-v1/;
12 compatible = "rockchip,rk3229-evb", "rockchip,rk3229";
15 stdout-path = &uart2;
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "ext_gmac";
27 #clock-cells = <0>;
30 vcc_phy: vcc-phy-regulator {
31 compatible = "regulator-fixed";
[all …]
H A Dfsl-imx8mq-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
11 #include "fsl-imx8mq.dtsi"
15 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
22 compatible = "simple-bus";
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "regulator-fixed";
28 regulator-name = "VSD_3V3";
29 regulator-min-microvolt = <3300000>;
[all …]
H A Dr8a7791-koelsch.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
11 * SSI-AK4643
38 /dts-v1/;
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
60 stdout-path = "serial0:115200n8";
74 #address-cells = <1>;
75 #size-cells = <1>;
79 compatible = "gpio-keys";
[all …]
H A Dimx6ull-colibri.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
12 compatible = "toradex,imx6ull-colibri", "fsl,imx6ull";
15 stdout-path = &uart1;
18 reg_module_3v3: regulator-module-3v3 {
19 compatible = "regulator-fixed";
20 regulator-always-on;
21 regulator-name = "+V3.3";
22 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx6q-cm-fx6.dts6 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include <dt-bindings/gpio/gpio.h>
49 model = "CompuLab CM-FX6";
50 compatible = "compulab,cm-fx6", "fsl,imx6q";
57 compatible = "gpio-leds";
59 heartbeat-led {
61 gpios = <&gpio2 31 0>;
62 linux,default-trigger = "heartbeat";
67 pinctrl-names = "default";
[all …]
H A Drk3368-px5-evb.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/input/input.h>
49 compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
52 stdout-path = "serial4:115200n8";
60 ext_gmac: gmac-clk {
61 compatible = "fixed-clock";
62 clock-frequency = <125000000>;
63 clock-output-names = "ext_gmac";
64 #clock-cells = <0>;
[all …]
H A Drk3368-geekbox.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/input/input.h>
52 stdout-path = "serial2:115200n8";
60 ext_gmac: gmac-clk {
61 compatible = "fixed-clock";
62 clock-frequency = <125000000>;
63 clock-output-names = "ext_gmac";
64 #clock-cells = <0>;
67 ir: ir-receiver {
[all …]
/openbmc/u-boot/board/technexion/tao3530/
H A Dtao3530.c1 // SPDX-License-Identifier: GPL-2.0+
16 #include <asm/mach-types.h>
19 #include <asm/ehci-omap.h>
72 * Description: If we use SPL then there is no x-loader nor config header
79 * Switch baseboard LED to red upon power-on in get_board_mem_timings()
91 timings->mcfg = MCFG(256 << 20, 14); /* RAS-width 14 */ in get_board_mem_timings()
92 timings->ctrla = HYNIX_V_ACTIMA_165; in get_board_mem_timings()
93 timings->ctrlb = HYNIX_V_ACTIMB_165; in get_board_mem_timings()
96 timings->mcfg = MCFG(128 << 20, 13); /* RAS-width 13 */ in get_board_mem_timings()
97 timings->ctrla = MICRON_V_ACTIMA_165; in get_board_mem_timings()
[all …]

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