Home
last modified time | relevance | path

Searched full:gpio (Results 1 – 25 of 2222) sorted by relevance

12345678910>>...89

/openbmc/u-boot/arch/arm/dts/
H A Ds5pc110-pinctrl.dtsi3 * U-Boot additions to enable a generic Exynos GPIO driver
13 gpio-controller;
14 #gpio-cells = <2>;
18 gpio-controller;
19 #gpio-cells = <2>;
23 gpio-controller;
24 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
33 gpio-controller;
[all …]
H A Ds5pc100-pinctrl.dtsi3 * U-Boot additions to enable a generic Exynos GPIO driver
11 gpio-controller;
12 #gpio-cells = <2>;
16 gpio-controller;
17 #gpio-cells = <2>;
21 gpio-controller;
22 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
31 gpio-controller;
[all …]
H A Dexynos5250-pinctrl.dtsi18 gpio-controller;
19 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
34 gpio-controller;
35 #gpio-cells = <2>;
42 gpio-controller;
43 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
[all …]
H A Dexynos4x12-pinctrl.dtsi18 gpio-controller;
19 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
34 gpio-controller;
35 #gpio-cells = <2>;
42 gpio-controller;
43 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
[all …]
H A Dexynos4210-pinctrl.dtsi20 gpio-controller;
21 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
36 gpio-controller;
37 #gpio-cells = <2>;
44 gpio-controller;
45 #gpio-cells = <2>;
52 gpio-controller;
53 #gpio-cells = <2>;
[all …]
H A Dexynos54xx-pinctrl.dtsi20 gpio-controller;
21 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
39 gpio-controller;
40 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
58 gpio-controller;
59 #gpio-cells = <2>;
[all …]
H A Dkeystone-k2hk.dtsi47 compatible = "ti,keystone-dsp-gpio";
48 gpio-controller;
49 #gpio-cells = <2>;
50 gpio,syscon-dev = <&devctrl 0x240>;
54 compatible = "ti,keystone-dsp-gpio";
55 gpio-controller;
56 #gpio-cells = <2>;
57 gpio,syscon-dev = <&devctrl 0x244>;
61 compatible = "ti,keystone-dsp-gpio";
62 gpio-controller;
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio.txt1 Specifying GPIO information for devices
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
21 GPIO properties can contain one or more GPIO phandles, but only in exceptional
30 The following example could be used to describe GPIO pins used as device enable
[all …]
H A Dsnps,creg-gpio.txt1 GPIO via CREG (control registers) driver
5 [ not used | gpio-1 | gpio-0 | <-shift-> ] < 32 bit register
12 - compatible : "snps,creg-gpio"
14 - #gpio-cells : Should be one - the pin number.
15 - gpio-controller : Marks the device node as a GPIO controller.
16 - gpio-count: Number of GPIO pins.
17 - gpio-bit-per-line: Number of bits per gpio line (see picture).
18 - gpio-first-shift: Shift (in bits) of the first GPIO field in register
20 - gpio-activate-val: Value should be set in corresponding field to set
21 output to "1" (see picture). Applied to all GPIO ports.
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dadi_gpio2.c12 #include <asm/gpio.h>
20 static void gpio_error(unsigned gpio) in gpio_error() argument
22 printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); in gpio_error()
56 static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
59 inline int check_gpio(unsigned gpio) in check_gpio() argument
62 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || in check_gpio()
63 gpio == GPIO_PH14 || gpio == GPIO_PH15 || in check_gpio()
64 gpio == GPIO_PJ14 || gpio == GPIO_PJ15) in check_gpio()
67 if (gpio >= MAX_GPIOS) in check_gpio()
72 static void port_setup(unsigned gpio, unsigned short usage) in port_setup() argument
[all …]
H A Dtegra_gpio.c3 * NVIDIA Tegra20 GPIO handling.
21 #include <asm/gpio.h>
23 #include <dt-bindings/gpio/gpio.h>
42 /* Return config of pin 'gpio' as GPIO (1) or SFIO (0) */
43 static int get_config(unsigned gpio) in get_config() argument
46 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in get_config()
50 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); in get_config()
51 type = (u >> GPIO_BIT(gpio)) & 1; in get_config()
54 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); in get_config()
59 /* Config pin 'gpio' as GPIO or SFIO, based on 'type' */
[all …]
H A DKconfig2 # GPIO infrastructure and drivers
5 menu "GPIO Support"
8 bool "Enable Driver Model for GPIO drivers"
11 Enable driver model for GPIO access. The standard GPIO
13 the GPIO uclass. Drivers provide methods to query the
15 is defined in include/asm-generic/gpio.h.
18 bool "Enable GPIO hog support"
22 Enable gpio hog support
23 The GPIO chip may contain GPIO hog definitions. GPIO hogging
24 is a mechanism providing automatic GPIO request and config-
[all …]
H A Dmvgpio.c15 #include <asm/gpio.h>
21 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
23 if (gpio >= MV_MAX_GPIO) { in gpio_request()
24 printf("%s: Invalid GPIO requested %d\n", __func__, gpio); in gpio_request()
30 int gpio_free(unsigned gpio) in gpio_free() argument
35 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
39 if (gpio >= MV_MAX_GPIO) { in gpio_direction_input()
40 printf("%s: Invalid GPIO %d\n", __func__, gpio); in gpio_direction_input()
44 gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); in gpio_direction_input()
45 writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr); in gpio_direction_input()
[all …]
H A Ds5p_gpio.c13 #include <asm/gpio.h>
21 #define CON_SFR(gpio, cfg) ((cfg) << ((gpio) << 2)) argument
22 #define CON_SFR_UNSHIFT(val, gpio) ((val) >> ((gpio) << 2)) argument
24 #define DAT_MASK(gpio) (0x1 << (gpio)) argument
25 #define DAT_SET(gpio) (0x1 << (gpio)) argument
27 #define PULL_MASK(gpio) (0x3 << ((gpio) << 1)) argument
28 #define PULL_MODE(gpio, pull) ((pull) << ((gpio) << 1)) argument
30 #define DRV_MASK(gpio) (0x3 << ((gpio) << 1)) argument
31 #define DRV_SET(gpio, mode) ((mode) << ((gpio) << 1)) argument
32 #define RATE_MASK(gpio) (0x1 << (gpio + 16)) argument
[all …]
H A Dmpc83xx_gpio.c3 * Freescale MPC83xx GPIO handling.
8 #include <asm/gpio.h>
36 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
38 if (gpio >= MAX_NUM_GPIOS) in gpio_request()
44 int gpio_free(unsigned gpio) in gpio_free() argument
50 /* set GPIO pin 'gpio' as an input */
51 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
59 ctrlr = gpio >> 5; in gpio_direction_input()
60 line = gpio & (0x1F); in gpio_direction_input()
65 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input()
[all …]
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,armada-37xx-pinctrl.txt1 * Marvell Armada 37xx SoC pin and GPIO controller
3 Each Armada 37xx SoC comes with two pin and GPIO controllers, one for the
6 GPIO and pin controller:
21 - reg: The first set of registers is for pinctrl/GPIO and the second
23 - interrupts: list of interrupts used by the GPIO
29 - functions jtag, gpio
33 - functions sdio, gpio
37 - functions emmc, gpio
41 - functions pwm, gpio
45 - functions pwm, gpio
[all …]
/openbmc/witherspoon-pfault-analysis/
H A Dgpio.hpp5 #include <linux/gpio.h>
12 namespace gpio namespace
22 * If the GPIO is an input or output
40 * Represents a GPIO.
42 * Currently supports reading a GPIO.
46 class GPIO class
49 GPIO() = delete;
50 GPIO(const GPIO&) = delete;
51 GPIO(GPIO&&) = default;
52 GPIO& operator=(const GPIO&) = delete;
[all …]
/openbmc/phosphor-power/
H A Dgpio.hpp5 #include <linux/gpio.h>
12 namespace gpio namespace
22 * If the GPIO is an input or output
40 * Represents a GPIO.
42 * Currently supports reading a GPIO.
46 class GPIO class
49 GPIO() = delete;
50 GPIO(const GPIO&) = delete;
51 GPIO(GPIO&&) = default;
52 GPIO& operator=(const GPIO&) = delete;
[all …]
/openbmc/qemu/tests/qtest/
H A Dnpcm7xx_gpio-test.c2 * QTest testcase for the Nuvoton NPCM7xx GPIO modules.
21 #define GPIO(x) (0xf0010000 + (x) * 0x1000) macro
24 /* GPIO registers */
58 if (readl(GPIO(n) + GP_N_TLOCK1) != 0) { in gpio_unlock()
59 writel(GPIO(n) + GP_N_TLOCK2, 0xc0de1248); in gpio_unlock()
60 writel(GPIO(n) + GP_N_TLOCK1, 0xc0defa73); in gpio_unlock()
64 /* Restore the GPIO controller to a sensible default state. */
69 writel(GPIO(n) + GP_N_EVEN, 0x00000000); in gpio_reset()
70 writel(GPIO(n) + GP_N_EVST, 0xffffffff); in gpio_reset()
71 writel(GPIO(n) + GP_N_POL, 0x00000000); in gpio_reset()
[all …]
H A Dstm32l4x5_gpio-test.c94 static uint32_t gpio_readl(unsigned int gpio, unsigned int offset) in gpio_readl() argument
96 return readl(gpio + offset); in gpio_readl()
99 static void gpio_writel(unsigned int gpio, unsigned int offset, uint32_t value) in gpio_writel() argument
101 writel(gpio + offset, value); in gpio_writel()
104 static void gpio_set_bit(unsigned int gpio, unsigned int reg, in gpio_set_bit() argument
108 gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << pin); in gpio_set_bit()
111 static void gpio_set_2bits(unsigned int gpio, unsigned int reg, in gpio_set_2bits() argument
116 gpio_writel(gpio, reg, (gpio_readl(gpio, reg) & mask) | value << offset); in gpio_set_2bits()
124 static void gpio_set_irq(unsigned int gpio, int num, int level) in gpio_set_irq() argument
126 g_autofree char *name = g_strdup_printf("/machine/soc/gpio%c", in gpio_set_irq()
[all …]
/openbmc/skeleton/libopenbmc_intf/
H A Dgpio.c14 #include "gpio.h"
18 #include <linux/gpio.h>
21 #define GPIO_BASE_PATH "/sys/class/gpio"
26 int gpio_write(GPIO* gpio, uint8_t value) in gpio_write() argument
28 g_assert (gpio != NULL); in gpio_write()
33 if (gpio->fd <= 0) in gpio_write()
38 if (ioctl(gpio->fd, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &data) < 0) in gpio_write()
46 int gpio_read(GPIO* gpio, uint8_t *value) in gpio_read() argument
48 g_assert (gpio != NULL); in gpio_read()
52 if (gpio->fd <= 0) in gpio_read()
[all …]
/openbmc/openbmc/meta-facebook/meta-catalina/recipes-phosphor/gpio/phosphor-gpio-monitor/clemente/
H A Dphosphor-multi-gpio-monitor.json47 "RISING": ["deassert-gpio-log@wSequence_Latch_State_N.service"],
48 "FALLING": ["assert-gpio-log@wSequence_Latch_State_N.service"]
57 "RISING": ["deassert-gpio-log@wP12V_N1N2_RUNTIME_FLT_N.service"],
58 "FALLING": ["assert-gpio-log@wP12V_N1N2_RUNTIME_FLT_N.service"]
67 "RISING": ["deassert-gpio-log@wP12V_FAN_RUNTIME_FLT_N.service"],
68 "FALLING": ["assert-gpio-log@wP12V_FAN_RUNTIME_FLT_N.service"]
77 "RISING": ["deassert-gpio-log@wHost_PERST_SEQPWR_FLT_N.service"],
78 "FALLING": ["assert-gpio-log@wHost_PERST_SEQPWR_FLT_N.service"]
87 "RISING": ["deassert-gpio-log@wP12V_AUX_RUNTIME_FLT_N.service"],
88 "FALLING": ["assert-gpio-log@wP12V_AUX_RUNTIME_FLT_N.service"]
[all …]
/openbmc/u-boot/include/
H A Dspl_gpio.h3 * Simple GPIO access from SPL. This only supports a single GPIO space,
4 * typically the SoC GPIO banks.
12 #include <asm/gpio.h>
15 * The functions listed here should be implemented in the SoC GPIO driver.
16 * They correspond to the normal GPIO API (asm-generic/gpio.h). The GPIO
20 * This API should only be used in TPL/SPL where GPIO access is needed but
23 * The caller must supply the GPIO register base since this information is
24 * often specific to a particular SoC generation. This allows the GPIO
29 * The 'gpio' value can include both a bank and a GPIO number, if desired. The
34 * spl_gpio_set_pull() - Set the pull up/down state of a GPIO
[all …]
/openbmc/openbmc/meta-yadro/meta-nicole/recipes-bsp/u-boot/files/
H A D0003-aspeed-add-gpio-support.patch4 Subject: [PATCH] aspeed: add gpio support
6 This is an initial support for the parallel GPIO pins directly connected
9 This brings the functions and a shell command to manipulate the GPIO
10 state. The GPIO value reading and writing work in non interrupt mode
15 arch/arm/include/asm/arch-aspeed/gpio.h | 65 ++++
17 drivers/gpio/Makefile | 2 +
18 drivers/gpio/aspeed_gpio.c | 386 ++++++++++++++++++++
20 create mode 100644 arch/arm/include/asm/arch-aspeed/gpio.h
21 create mode 100644 drivers/gpio/aspeed_gpio.c
23 diff --git a/arch/arm/include/asm/arch-aspeed/gpio.h b/arch/arm/include/asm/arch-aspeed/gpio.h
[all …]
/openbmc/u-boot/include/asm-generic/
H A Dgpio.h15 * Generic GPIO API for U-Boot
29 * Each GPIO can be an input or output. If an input then its value can
35 * In some cases the operation may fail, for example if the GPIO number
36 * is out of range, or the GPIO is not available because its pin is
43 * Request a GPIO. This should be called before any of the other functions
44 * are used on this GPIO.
49 * @param gpio GPIO number
50 * @param label User label for this GPIO
53 int gpio_request(unsigned gpio, const char *label);
57 * Stop using the GPIO. This function should not alter pin configuration.
[all …]

12345678910>>...89