1*5c01d1c0SSimon Glass /* SPDX-License-Identifier: GPL-2.0+ */ 2*5c01d1c0SSimon Glass /* 3*5c01d1c0SSimon Glass * Simple GPIO access from SPL. This only supports a single GPIO space, 4*5c01d1c0SSimon Glass * typically the SoC GPIO banks. 5*5c01d1c0SSimon Glass * 6*5c01d1c0SSimon Glass * Copyright 2018 Google LLC 7*5c01d1c0SSimon Glass */ 8*5c01d1c0SSimon Glass 9*5c01d1c0SSimon Glass #ifndef __SPL_GPIO_H 10*5c01d1c0SSimon Glass #define __SPL_GPIO_H 11*5c01d1c0SSimon Glass 12*5c01d1c0SSimon Glass #include <asm/gpio.h> 13*5c01d1c0SSimon Glass 14*5c01d1c0SSimon Glass /* 15*5c01d1c0SSimon Glass * The functions listed here should be implemented in the SoC GPIO driver. 16*5c01d1c0SSimon Glass * They correspond to the normal GPIO API (asm-generic/gpio.h). The GPIO 17*5c01d1c0SSimon Glass * number is encoded in an unsigned int by an SoC-specific means. Pull 18*5c01d1c0SSimon Glass * values are also SoC-specific. 19*5c01d1c0SSimon Glass * 20*5c01d1c0SSimon Glass * This API should only be used in TPL/SPL where GPIO access is needed but 21*5c01d1c0SSimon Glass * driver model is not available (yet) or adds too much overhead. 22*5c01d1c0SSimon Glass * 23*5c01d1c0SSimon Glass * The caller must supply the GPIO register base since this information is 24*5c01d1c0SSimon Glass * often specific to a particular SoC generation. This allows the GPIO 25*5c01d1c0SSimon Glass * code to be fairly generic. 26*5c01d1c0SSimon Glass * 27*5c01d1c0SSimon Glass * Only a single implementation of each of these functions can be provided. 28*5c01d1c0SSimon Glass * 29*5c01d1c0SSimon Glass * The 'gpio' value can include both a bank and a GPIO number, if desired. The 30*5c01d1c0SSimon Glass * encoding is SoC-specific. 31*5c01d1c0SSimon Glass */ 32*5c01d1c0SSimon Glass 33*5c01d1c0SSimon Glass /** 34*5c01d1c0SSimon Glass * spl_gpio_set_pull() - Set the pull up/down state of a GPIO 35*5c01d1c0SSimon Glass * 36*5c01d1c0SSimon Glass * @regs: Pointer to GPIO registers 37*5c01d1c0SSimon Glass * @gpio: GPIO to adjust (SoC-specific) 38*5c01d1c0SSimon Glass * @pull: Pull value (SoC-specific) 39*5c01d1c0SSimon Glass * @return return 0 if OK, -ve on error 40*5c01d1c0SSimon Glass */ 41*5c01d1c0SSimon Glass int spl_gpio_set_pull(void *regs, uint gpio, int pull); 42*5c01d1c0SSimon Glass 43*5c01d1c0SSimon Glass /** 44*5c01d1c0SSimon Glass * spl_gpio_output() - Set a GPIO as an output 45*5c01d1c0SSimon Glass * 46*5c01d1c0SSimon Glass * @regs: Pointer to GPIO registers 47*5c01d1c0SSimon Glass * @gpio: GPIO to adjust (SoC-specific) 48*5c01d1c0SSimon Glass * @value: 0 to set the output low, 1 to set it high 49*5c01d1c0SSimon Glass * @return return 0 if OK, -ve on error 50*5c01d1c0SSimon Glass */ 51*5c01d1c0SSimon Glass int spl_gpio_output(void *regs, uint gpio, int value); 52*5c01d1c0SSimon Glass 53*5c01d1c0SSimon Glass /** 54*5c01d1c0SSimon Glass * spl_gpio_input() - Set a GPIO as an input 55*5c01d1c0SSimon Glass * 56*5c01d1c0SSimon Glass * @regs: Pointer to GPIO registers 57*5c01d1c0SSimon Glass * @gpio: GPIO to adjust (SoC-specific) 58*5c01d1c0SSimon Glass * @return return 0 if OK, -ve on error 59*5c01d1c0SSimon Glass */ 60*5c01d1c0SSimon Glass int spl_gpio_input(void *regs, uint gpio); 61*5c01d1c0SSimon Glass 62*5c01d1c0SSimon Glass #endif /* __SPL_GPIO_H */ 63