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/openbmc/u-boot/arch/arm/dts/
H A Dhi3798cv200.dtsi4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
7 * SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/clock/histb-clock.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/reset/ti-syscon.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
H A Darmada-xp-mv78260.dtsi6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
50 #include "armada-xp.dtsi"
54 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
63 #address-cells = <1>;
64 #size-cells = <0>;
65 enable-method = "marvell,armada-xp-smp";
69 compatible = "marvell,sheeva-v7";
72 clock-latency = <1000000>;
77 compatible = "marvell,sheeva-v7";
[all …]
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
H A Dhi6220.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
[all …]
H A Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range { label
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
23 /* pin base, nr pins & gpio function */
[all …]
H A Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range { label
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
21 /* pin base, nr pins & gpio function */
[all …]
/openbmc/linux/drivers/pinctrl/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
32 #include "../gpio/gpiolib.h"
62 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
77 return pctldev->desc->name; in pinctrl_dev_get_name()
83 return dev_name(pctldev->dev); in pinctrl_dev_get_devname()
89 return pctldev->driver_data; in pinctrl_dev_get_drvdata()
94 * get_pinctrl_dev_from_devname() - look up pin controller device
[all …]
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
24 #include <linux/radix-tree.h>
38 const struct pinmux_ops *ops = pctldev->desc->pmxops; in pinmux_check_ops()
44 !ops->get_functions_count || in pinmux_check_ops()
45 !ops->get_function_name || in pinmux_check_ops()
46 !ops->get_function_groups || in pinmux_check_ops()
47 !ops->set_mux) { in pinmux_check_ops()
[all …]
/openbmc/u-boot/doc/device-tree-bindings/gpio/
H A Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
21 GPIO properties can contain one or more GPIO phandles, but only in exceptional
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl-single.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
14 range of pin control registers can vary from one to many for each controller
21 - enum:
22 - pinctrl-single
23 - pinconf-single
24 - items:
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/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dsh_pfc.c2 * Pinmuxed GPIO support for SuperH.
23 if (enum_id < r->begin) in enum_in_range()
26 if (enum_id > r->end) in enum_in_range()
74 pos = dr->reg_width - (in_pos + 1); in gpio_read_bit()
77 dr->reg + offset, pos, dr->reg_width); in gpio_read_bit()
79 return (gpio_read_raw_reg(dr->mapped_reg + offset, in gpio_read_bit()
80 dr->reg_width) >> pos) & 1; in gpio_read_bit()
88 pos = dr->reg_width - (in_pos + 1); in gpio_write_bit()
92 dr->reg, !!value, pos, dr->reg_width); in gpio_write_bit()
95 __set_bit(pos, &dr->reg_shadow); in gpio_write_bit()
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/openbmc/u-boot/drivers/led/
H A DKconfig8 U-Boot provides a uclass API to implement this feature. LED drivers
9 can provide access to board-specific LEDs. Use of the device tree
50 bool "LED support for GPIO-connected LEDs"
53 Enable support for LEDs which are connected to GPIO lines. These
55 The GPIO driver must used driver model. LEDs are configured using
59 bool "LED support for GPIO-connected LEDs in SPL"
62 This option is an SPL-variant of the LED_GPIO option.
68 Allows common u-boot commands to use a board's leds to
90 bool "GPIO status LED implementation"
92 The status LED can be connected to a GPIO pin. In such cases, the
[all …]
/openbmc/linux/include/linux/pinctrl/
H A Dpinmux.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2011 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
7 * Based on bits of regulator core, gpio core and clk core
20 * struct pinmux_ops - pinmux operations, to be implemented by pin controller
44 * @gpio_request_enable: requests and enables GPIO on a certain pin.
45 * Implement this only if you can mux every pin individually as GPIO. The
46 * affected GPIO range is passed along with an offset(pin number) into that
47 * specific GPIO range - function selectors and pin groups are orthogonal
49 * @gpio_disable_free: free up GPIO muxing on a certain pin, the reverse of
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
21 - adi,ad7605-4
22 - adi,ad7606-8
23 - adi,ad7606-6
[all …]
/openbmc/linux/Documentation/driver-api/
H A Dpin-control.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
28 in the range 0..maxpin. This numberspace is local to each PIN CONTROLLER, so
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-tangier.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Intel Tangier GPIO functions
15 #include <linux/gpio/driver.h>
34 * struct tng_wake_regs - Platform specific wake registers
46 * struct tng_gpio_pinrange - Map pin numbers to gpio numbers
47 * @gpio_base: Starting GPIO number of this range
48 * @pin_base: Starting pin number of this range
49 * @npins: Number of pins in this range
61 .npins = (gend) - (gstart) + 1, \
65 * struct tng_gpio_pin_info - Platform specific pinout information
[all …]
H A Dgpio-tangier.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Intel Tangier GPIO driver
21 #include <linux/pinctrl/pinconf-generic.h>
26 #include <linux/gpio/driver.h>
28 #include "gpio-tangier.h"
44 * struct tng_gpio_context - Context to be saved during suspend-resume
67 return priv->reg_base + reg + reg_offset * 4; in gpio_reg()
78 return priv->reg_base + reg + reg_offset * 4; in gpio_reg_and_bit()
100 raw_spin_lock_irqsave(&priv->lock, flags); in tng_gpio_set()
104 raw_spin_unlock_irqrestore(&priv->lock, flags); in tng_gpio_set()
[all …]
/openbmc/linux/drivers/pinctrl/stm32/
H A Dpinctrl-stm32.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/gpio/driver.h>
28 #include <linux/pinctrl/pinconf-generic.h>
35 #include "../pinctrl-utils.h"
36 #include "pinctrl-stm32.h"
68 container_of(chip, struct stm32_gpio_bank, range)
73 "gpio", "af0", "af1",
93 struct pinctrl_gpio_range range; member
124 static inline int stm32_gpio_pin(int gpio) in stm32_gpio_pin() argument
126 return gpio % STM32_GPIO_PINS_PER_BANK; in stm32_gpio_pin()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74115H is a single-channel software configurable input/output
17 chip solution with an SPI interface. The device features a 16-bit ADC and a
18 14-bit DAC.
25 - adi,ad74115h
30 spi-max-frequency:
33 spi-cpol: true
[all …]
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-xp-mv78260.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
26 #address-cells = <1>;
27 #size-cells = <0>;
28 enable-method = "marvell,armada-xp-smp";
32 compatible = "marvell,sheeva-v7";
35 clock-latency = <1000000>;
40 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78460.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
27 #address-cells = <1>;
28 #size-cells = <0>;
29 enable-method = "marvell,armada-xp-smp";
33 compatible = "marvell,sheeva-v7";
36 clock-latency = <1000000>;
41 compatible = "marvell,sheeva-v7";
[all …]
H A Darmada-xp-mv78230.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 #include "armada-xp.dtsi"
17 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 enable-method = "marvell,armada-xp-smp";
31 compatible = "marvell,sheeva-v7";
34 clock-latency = <1000000>;
39 compatible = "marvell,sheeva-v7";
[all …]
/openbmc/linux/arch/arm/mach-s3c/
H A Dgpio-cfg.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 * S3C Platform - GPIO pin configuration
11 /* This file contains the necessary definitions to get the basic gpio
13 * changing the pull-{up,down} configurations.
27 /* forward declaration if gpio-core.h hasn't been included */
31 * struct samsung_gpio_cfg GPIO configuration
33 * @get_pull: Read the current pull configuration for the GPIO
34 * @set_pull: Set the current pull configuration for the GPIO
35 * @set_config: Set the current configuration for the GPIO
36 * @get_config: Read the current configuration for the GPIO
[all …]

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