hw/misc/tz-ppc.h

13  * It is documented in the ARM CoreLink SIE-200 System IP for Embedded TRM
15  * https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
22  * The PPC has no register interface -- it is configured purely by a
24  * they are either hardwired or exposed in an ad-hoc register interface by
43  *   range then no sysbus MMIO region is created for its upstream. When an
44  *   unused port lies in the middle of the range with other used ports at
50  * + Named GPIO inputs "cfg_nonsec[0..15]": set to 1 if the port should be
52  * + Named GPIO inputs "cfg_ap[0..15]": set to 1 if the port should be
53  *   accessible to non-privileged transactions
54  * + Named GPIO input "cfg_sec_resp": set to 1 if a rejected transaction should
56  * + Named GPIO input "irq_enable": set to 1 to enable interrupts
57  * + Named GPIO input "irq_clear": set to 1 to clear a pending interrupt
58  * + Named GPIO output "irq": set for a transaction-failed interrupt
71 #define TYPE_TZ_PPC "tz-ppc"