| /openbmc/linux/drivers/gpio/ |
| H A D | gpio-en7523.c | 1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/gpio/driver.h>
15 * airoha_gpio_ctrl - Airoha GPIO driver data
25 void __iomem *dir[2]; member
34 static int airoha_dir_set(struct gpio_chip *gc, unsigned int gpio, in airoha_dir_set() argument
38 u32 dir = ioread32(ctrl->dir[gpio / 16]); in airoha_dir_set() local
39 u32 output = ioread32(ctrl->output); in airoha_dir_set()
40 u32 mask = BIT((gpio % 16) * 2); in airoha_dir_set()
43 dir |= mask; in airoha_dir_set()
44 output |= BIT(gpio); in airoha_dir_set()
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| H A D | gpio-clps711x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * CLPS711X GPIO driver
10 #include <linux/gpio/driver.h>
15 struct device_node *np = pdev->dev.of_node; in clps711x_gpio_probe()
16 void __iomem *dat, *dir; in clps711x_gpio_probe() local
21 return -ENODEV; in clps711x_gpio_probe()
23 id = of_alias_get_id(np, "gpio"); in clps711x_gpio_probe()
25 return -ENODEV; in clps711x_gpio_probe()
27 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); in clps711x_gpio_probe()
29 return -ENOMEM; in clps711x_gpio_probe()
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| H A D | gpio-xilinx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Xilinx gpio driver for xps/axi_gpio IP.
5 * Copyright 2008 - 2013 Xilinx, Inc.
12 #include <linux/gpio/driver.h>
35 /* Read/Write access to the GPIO registers */
45 * struct xgpio_instance - Stores information about GPIO device
46 * @gc: GPIO chip
48 * @hw_map: GPIO pin mapping on hardware side
49 * @sw_map: GPIO pin mapping on software side
50 * @state: GPIO write state shadow register
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| H A D | gpio-dln2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-GPIO adapter
15 #include <linux/gpio/driver.h>
48 struct gpio_chip gpio; member
56 /* active IRQs - not synced to hardware */
58 /* active IRQS - synced to hardware */
83 return -EPROTO; in dln2_gpio_get_pin_count()
94 return dln2_transfer_tx(dln2->pdev, cmd, &req, sizeof(req)); in dln2_gpio_pin_cmd()
106 ret = dln2_transfer(dln2->pdev, cmd, &req, sizeof(req), &rsp, &len); in dln2_gpio_pin_val()
110 return -EPROTO; in dln2_gpio_pin_val()
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| H A D | gpio-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TI DaVinci GPIO Support
5 * Copyright (c) 2006-2007 David Brownell
9 #include <linux/gpio/driver.h>
22 #include <linux/platform_data/gpio-davinci.h>
31 u32 dir; member
45 #define BINTEN 0x8 /* GPIO Interrupt Per-Bank Enable Register */
59 /* Serialize access to GPIO registers */
68 static inline u32 __gpio_mask(unsigned gpio) in __gpio_mask() argument
70 return 1 << (gpio % 32); in __gpio_mask()
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| H A D | gpio-f7188x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for Fintek and Nuvoton Super-I/O chips
5 * Copyright (C) 2010-2013 LaCie
10 #define DRVNAME "gpio-f7188x"
17 #include <linux/gpio/driver.h>
21 * Super-I/O registers
26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
46 #define SIO_LD_GPIO_FINTEK 0x06 /* GPIO logical device */
53 #define SIO_LD_GPIO_NUVOTON 0x07 /* GPIO logical device */
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| H A D | gpio-lpc18xx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * GPIO driver for NXP LPC18xx/43xx.
11 #include <linux/gpio/driver.h>
21 /* LPC18xx GPIO register offsets */
27 /* LPC18xx GPIO pin interrupt controller register offsets */
48 struct gpio_chip gpio; member
58 u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
65 writel_relaxed(val, ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
71 writel_relaxed(BIT(pin), ic->base + reg); in lpc18xx_gpio_pin_ic_set()
76 struct lpc18xx_gpio_pin_ic *ic = d->chip_data; in lpc18xx_gpio_pin_ic_mask()
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| /openbmc/linux/Documentation/devicetree/bindings/gpio/ |
| H A D | gpio-ep9301.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-ep9301.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: EP93xx GPIO controller
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Bartosz Golaszewski <brgl@bgdev.pl>
12 - Nikita Shubin <nikita.shubin@maquefel.me>
17 - const: cirrus,ep9301-gpio
18 - items:
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| /openbmc/linux/include/dt-bindings/sound/ |
| H A D | cs35l45.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
30 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | cirrus,cs35l45.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
28 '#sound-dai-cells':
31 reset-gpios:
34 vdd-a-supply:
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| /openbmc/skeleton/pytools/ |
| H A D | gpioutil | 13 print 'gpioutil -n GPIO_NAME [-v value]'
14 print 'gpioutil -i GPIO_NUM -d <DIRECTION = in,out,falling,rising,both> [-v value]'
15 print 'gpioutil -p PIN_NAME -d <DIRECTION = in,out,falling,rising,both> [-v value]'
16 print 'gpioutil -l PIN_NAME (lookup pin name only)'
27 GPIO_SYSFS = '/sys/class/gpio/'
30 def find_gpio_base(path="/sys/class/gpio/"):
35 if label == "1e780000.gpio":
48 a = ord(port[-1]) - ord('A')
55 class Gpio:
63 return GPIO_SYSFS+'gpio'+self.gpio_num+'/'+name
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | mpc85xx_gpio.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
12 * The following internal functions are an MPC85XX-specific GPIO API which
17 * memory-mapped IO operation or two.
20 unsigned int dir, unsigned int val) in mpc85xx_gpio_set() argument
22 ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); in mpc85xx_gpio_set() local
24 /* First mask off the unwanted parts of "dir" and "val" */ in mpc85xx_gpio_set()
25 dir &= mask; in mpc85xx_gpio_set()
29 dir |= (in_be32(&gpio->gpdir) & ~mask); in mpc85xx_gpio_set()
30 val |= (in_be32(&gpio->gpdat) & ~mask); in mpc85xx_gpio_set()
37 out_be32(&gpio->gpdat, val); in mpc85xx_gpio_set()
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| /openbmc/skeleton/libopenbmc_intf/ |
| H A D | gpio.c | 14 #include "gpio.h"
18 #include <linux/gpio.h>
21 #define GPIO_BASE_PATH "/sys/class/gpio"
26 int gpio_write(GPIO* gpio, uint8_t value) in gpio_write() argument
28 g_assert (gpio != NULL); in gpio_write()
33 if (gpio->fd <= 0) in gpio_write()
38 if (ioctl(gpio->fd, GPIOHANDLE_SET_LINE_VALUES_IOCTL, &data) < 0) in gpio_write()
46 int gpio_read(GPIO* gpio, uint8_t *value) in gpio_read() argument
48 g_assert (gpio != NULL); in gpio_read()
52 if (gpio->fd <= 0) in gpio_read()
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| /openbmc/linux/arch/m68k/coldfire/ |
| H A D | gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Coldfire generic GPIO support.
12 #include <linux/gpio/driver.h>
19 int __mcfgpio_get_value(unsigned gpio) in __mcfgpio_get_value() argument
21 return mcfgpio_read(__mcfgpio_ppdr(gpio)) & mcfgpio_bit(gpio); in __mcfgpio_get_value()
25 void __mcfgpio_set_value(unsigned gpio, int value) in __mcfgpio_set_value() argument
27 if (gpio < MCFGPIO_SCR_START) { in __mcfgpio_set_value()
32 data = mcfgpio_read(__mcfgpio_podr(gpio)); in __mcfgpio_set_value()
34 data |= mcfgpio_bit(gpio); in __mcfgpio_set_value()
36 data &= ~mcfgpio_bit(gpio); in __mcfgpio_set_value()
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| /openbmc/u-boot/drivers/gpio/ |
| H A D | mpc83xx_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale MPC83xx GPIO handling.
8 #include <asm/gpio.h>
36 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
38 if (gpio >= MAX_NUM_GPIOS) in gpio_request()
39 return -1; in gpio_request()
44 int gpio_free(unsigned gpio) in gpio_free() argument
50 /* set GPIO pin 'gpio' as an input */
51 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
58 /* 32-bits per controller */ in gpio_direction_input()
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| H A D | aspeed_gpio.c | 2 * ast_gpio.c - GPIO driver for the Aspeed SoC
10 #include <asm/gpio.h>
146 static inline void __iomem *bank_reg(struct aspeed_gpio_priv *gpio, in bank_reg() argument
152 return gpio->regs + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
154 return gpio->regs + bank->rdata_reg; in bank_reg()
156 return gpio->regs + bank->val_regs + GPIO_VAL_DIR; in bank_reg()
158 return gpio->regs + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
160 return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
162 return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
164 return gpio->regs + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
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| H A D | da8xx_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * GPIO driver for TI DaVinci DA8xx SOCs.
13 #include <asm/gpio.h>
14 #include <dt-bindings/gpio/gpio.h>
28 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
313 int gpio_request(unsigned int gpio, const char *label) in gpio_request() argument
315 if (gpio >= MAX_NUM_GPIOS) in gpio_request()
316 return -1; in gpio_request()
318 if (gpio_registry[gpio].is_registered) in gpio_request()
319 return -1; in gpio_request()
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| /openbmc/u-boot/arch/x86/lib/ |
| H A D | pinctrl_ich6.c | 1 // SPDX-License-Identifier: GPL-2.0+
13 #include <asm/gpio.h>
51 static int ich6_pinctrl_set_direction(uint16_t base, unsigned offset, int dir) in ich6_pinctrl_set_direction() argument
53 if (!dir) in ich6_pinctrl_set_direction()
66 int dir, val; in ich6_pinctrl_cfg_pin() local
70 * GPIO node is not mandatory, so we only do the pinmuxing if the in ich6_pinctrl_cfg_pin()
73 ret = fdtdec_get_int_array(gd->fdt_blob, pin_node, "gpio-offset", in ich6_pinctrl_cfg_pin()
76 /* Do we want to force the GPIO mode? */ in ich6_pinctrl_cfg_pin()
77 is_gpio = fdtdec_get_bool(gd->fdt_blob, pin_node, "mode-gpio"); in ich6_pinctrl_cfg_pin()
83 dir = fdtdec_get_int(gd->fdt_blob, pin_node, "direction", -1); in ich6_pinctrl_cfg_pin()
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| /openbmc/linux/drivers/mfd/ |
| H A D | wm8350-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8350-core.c -- Device access for Wolfson WM8350
15 #include <linux/mfd/wm8350/gpio.h>
18 static int gpio_set_dir(struct wm8350 *wm8350, int gpio, int dir) in gpio_set_dir() argument
23 if (dir == WM8350_GPIO_DIR_OUT) in gpio_set_dir()
26 1 << gpio); in gpio_set_dir()
30 1 << gpio); in gpio_set_dir()
35 static int wm8350_gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db) in wm8350_gpio_set_debounce() argument
39 1 << gpio); in wm8350_gpio_set_debounce()
42 WM8350_GPIO_DEBOUNCE, 1 << gpio); in wm8350_gpio_set_debounce()
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ |
| H A D | nv10.c | 29 nv10_gpio_sense(struct nvkm_gpio *gpio, int line) in nv10_gpio_sense() argument
31 struct nvkm_device *device = gpio->subdev.device; in nv10_gpio_sense()
38 line = (line - 2) * 4; in nv10_gpio_sense()
43 line = (line - 10) * 4; in nv10_gpio_sense()
48 return -EINVAL; in nv10_gpio_sense()
52 nv10_gpio_drive(struct nvkm_gpio *gpio, int line, int dir, int out) in nv10_gpio_drive() argument
54 struct nvkm_device *device = gpio->subdev.device; in nv10_gpio_drive()
61 data = (dir << 4) | out; in nv10_gpio_drive()
64 line = (line - 2) * 4; in nv10_gpio_drive()
67 data = (dir << 1) | out; in nv10_gpio_drive()
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| H A D | base.c | 29 nvkm_gpio_drive(struct nvkm_gpio *gpio, int idx, int line, int dir, int out) in nvkm_gpio_drive() argument
31 return gpio->func->drive(gpio, line, dir, out); in nvkm_gpio_drive()
35 nvkm_gpio_sense(struct nvkm_gpio *gpio, int idx, int line) in nvkm_gpio_sense() argument
37 return gpio->func->sense(gpio, line); in nvkm_gpio_sense()
41 nvkm_gpio_reset(struct nvkm_gpio *gpio, u8 func) in nvkm_gpio_reset() argument
43 if (gpio->func->reset) in nvkm_gpio_reset()
44 gpio->func->reset(gpio, func); in nvkm_gpio_reset()
48 nvkm_gpio_find(struct nvkm_gpio *gpio, int idx, u8 tag, u8 line, in nvkm_gpio_find() argument
51 struct nvkm_device *device = gpio->subdev.device; in nvkm_gpio_find()
52 struct nvkm_bios *bios = device->bios; in nvkm_gpio_find()
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| /openbmc/linux/arch/powerpc/platforms/8xx/ |
| H A D | cpm1.c | 1 // SPDX-License-Identifier: GPL-2.0
27 #include <linux/dma-mapping.h>
47 #include <linux/gpio/legacy-of-mm-gpiochip.h>
57 cpmp = &mpc8xx_immr->im_cpm; in cpm_reset()
61 out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG); in cpm_reset()
64 while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG); in cpm_reset()
79 out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 0x40); in cpm_reset()
81 out_be32(&mpc8xx_immr->im_siu_conf.sc_sdcr, 1); in cpm_reset()
94 return -EINVAL; in cpm_command()
99 out_be16(&cpmp->cp_cpcr, command | CPM_CR_FLG | (opcode << 8)); in cpm_command()
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| /openbmc/qemu/hw/gpio/ |
| H A D | omap_gpio.c | 2 * TI OMAP processors GPIO emulation.
4 * Copyright (C) 2006-2008 Andrzej Zaborowski <balrog@zabor.org>
5 * Copyright (C) 2007-2009 Nokia Corporation
24 #include "hw/qdev-properties.h"
27 #include "qemu/error-report.h"
37 uint16_t dir; member
53 /* General-Purpose I/O of OMAP1 */
57 struct omap_gpio_s *s = &p->omap1; in omap_gpio_set()
58 uint16_t prev = s->inputs; in omap_gpio_set()
61 s->inputs |= 1 << line; in omap_gpio_set()
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| /openbmc/linux/drivers/pinctrl/ |
| H A D | pinctrl-stmfx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
8 #include <linux/gpio/driver.h>
19 #include "pinctrl-utils.h"
53 * Pins availability is managed thanks to gpio-ranges property.
112 ret = regmap_read(pctl->stmfx->map, reg, &value); in stmfx_gpio_get()
123 regmap_write_bits(pctl->stmfx->map, reg + get_reg(offset), in stmfx_gpio_set()
135 ret = regmap_read(pctl->stmfx->map, reg, &val); in stmfx_gpio_get_direction()
137 * On stmfx, gpio pins direction is (0)input, (1)output. in stmfx_gpio_get_direction()
154 return regmap_write_bits(pctl->stmfx->map, reg, mask, 0); in stmfx_gpio_direction_input()
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