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/openbmc/u-boot/doc/device-tree-bindings/video/
H A Dtegra20-dc.txt2 ------------------
5 U-Boot, and may change based on Linux activity)
12 - compatible : Should be "nvidia,tegra20-dc"
17 - nvidia,panel : phandle of LCD panel information
24 - nvidia,bits-per-pixel: number of bits per pixel (depth)
25 - nvidia,pwm : pwm to use to set display contrast (see tegra20-pwm.txt)
26 - nvidia,panel-timings: 4 cells containing required timings in ms:
28 * delay between panel_vdd-rise and data-rise
29 * delay between data-rise and backlight_vdd-rise
30 * delay between backlight_vdd and pwm-rise
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dtegra20-colibri.dts1 /dts-v1/;
10 stdout-path = &uarta;
19 usb1 = "/usb@c5004000"; /* On-module only, for ASIX */
28 display-timings {
31 clock-frequency = <25175000>;
34 hback-porch = <48>;
35 hfront-porch = <16>;
36 hsync-len = <96>;
37 vback-porch = <31>;
38 vfront-porch = <11>;
[all …]
H A Domap3-panel-sharp-ls037v7dw01.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 * at minimum the GPIO enable-gpios for display, and
7 * gpios for gpio-backlight.
15 backlight0: backlight {
16 compatible = "gpio-backlight";
17 default-on;
20 /* 3.3V GPIO controlled regulator for LCD_ENVDD */
21 lcd_3v3: regulator-lcd-3v3 {
22 compatible = "regulator-fixed";
23 regulator-name = "lcd_3v3";
[all …]
H A Dat91sam9n12ek.dts2 * at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
9 /dts-v1/;
13 model = "Atmel AT91SAM9N12-EK";
18 stdout-path = "serial0:115200n8";
19 u-boot,dm-pre-reloc;
28 clock-frequency = <32768>;
32 clock-frequency = <16000000>;
39 u-boot,dm-pre-reloc;
54 clock-names = "mclk";
60 interrupt-parent = <&pioA>;
[all …]
H A Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
11 #include "rk3288-veyron-speedy-u-boot.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
[all …]
H A Dtegra20-medcom-wide.dts1 /dts-v1/;
3 #include "tegra20-tamonten.dtsi"
6 model = "Avionic Design Medcom-Wide";
7 compatible = "ad,medcom-wide", "nvidia,tegra20";
10 stdout-path = &uartd;
36 clock-frequency = <216000000>;
51 left-margin = <2>;
52 right-margin = <47>;
53 hsync-len = <136>;
54 lower-margin = <21>;
[all …]
H A Dtegra20-tec.dts1 /dts-v1/;
3 #include "tegra20-tamonten.dtsi"
10 stdout-path = &uartd;
36 clock-frequency = <216000000>;
63 left-margin = <120>;
64 right-margin = <120>;
65 hsync-len = <16>;
66 lower-margin = <15>;
67 upper-margin = <15>;
68 vsync-len = <15>;
[all …]
H A Dsun5i-a13-empire-electronix-d709.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun5i-a13.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/pwm/pwm.h>
53 compatible = "empire-electronix,d709", "allwinner,sun5i-a13";
59 backlight: backlight { label
[all …]
H A Drk3399-evb.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
10 #include "rk3399-sdram-lpddr3-4GB-1600.dtsi"
14 compatible = "rockchip,rk3399-evb", "rockchip,rk3399",
15 "google,rk3399evb-rev2";
18 stdout-path = &uart2;
19 u-boot,spl-boot-order = \
23 vdd_center: vdd-center {
[all …]
H A Dsun5i-q8-common.dtsi4 * This file is dual-licensed: you can use it either under the terms
42 #include "sunxi-q8-common.dtsi"
44 #include <dt-bindings/pwm/pwm.h>
51 backlight: backlight { label
52 compatible = "pwm-backlight";
54 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
55 default-brightness-level = <8>;
56 /* TODO: backlight uses axp gpio1 as enable pin */
60 stdout-path = "serial0:115200n8";
65 cpu-supply = <&reg_dcdc2>;
[all …]
H A Dstm32f746-disco.dts2 * Copyright 2016 - Michael Kurz <michi.kurz@gmail.com>
3 * Copyright 2016 - Vikas MANOCHA <vikas.manocha@st.com>
6 * stm32f469-disco.dts from Linux
7 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
9 * This file is dual-licensed: you can use it either under the terms
48 /dts-v1/;
50 #include <dt-bindings/memory/stm32-sdram.h>
51 #include <dt-bindings/gpio/gpio.h>
54 model = "STMicroelectronics STM32F746-DISCO board";
55 compatible = "st,stm32f746-disco", "st,stm32f746";
[all …]
H A Dtegra20-paz00.dts1 /dts-v1/;
3 #include <dt-bindings/input/input.h>
11 stdout-path = &uarta;
39 display-timings {
42 clock-frequency = <54030000>;
45 hback-porch = <160>;
46 hfront-porch = <24>;
47 hsync-len = <136>;
48 vback-porch = <3>;
49 vfront-porch = <61>;
[all …]
H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0+
3 * SAMSUNG/GOOGLE Peach-Pit board device tree source
9 /dts-v1/;
14 cpu-model = "Exynos5800";
16 compatible = "google,pit-rev#", "google,pit",
20 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
21 hwid = "PIT TEST A-A 7848";
22 lazy-init = <1>;
32 backlight: backlight { label
33 compatible = "pwm-backlight";
[all …]
H A Drk3288-veyron-jerry.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "cros-ec-sbs.dtsi"
14 compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
15 "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
16 "google,veyron-jerry-rev3", "google,veyron-jerry",
20 stdout-path = &uart2;
23 panel_regulator: panel-regulator {
24 compatible = "regulator-fixed";
[all …]
H A Dsun4i-a10-pov-protab2-ips9.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
44 #include "sun4i-a10.dtsi"
45 #include "sunxi-common-regulators.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
49 #include <dt-bindings/pwm/pwm.h>
52 model = "Point of View Protab2-IPS9";
53 compatible = "pov,protab2-ips9", "allwinner,sun4i-a10";
[all …]
H A Dsun5i-reference-design-tablet.dtsi4 * This file is dual-licensed: you can use it either under the terms
42 #include "sunxi-reference-design-tablet.dtsi"
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/pwm/pwm.h>
52 backlight: backlight { label
53 compatible = "pwm-backlight";
55 brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
56 default-brightness-level = <8>;
57 /* TODO: backlight uses axp gpio1 as enable pin */
61 stdout-path = "serial0:115200n8";
[all …]
H A Dimx6q-logicpd.dts5 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
46 #include "imx6-logicpd-som.dtsi"
47 #include "imx6-logicpd-baseboard.dtsi"
50 model = "Logic PD i.MX6QD SOM-M3 (HDMI)";
53 backlight: backlight_lvds { label
54 compatible = "pwm-backlight";
56 brightness-levels = <0 4 8 16 32 64 128 255>;
57 default-brightness-level = <6>;
58 power-supply = <&reg_lcd>;
[all …]
H A Drk3288-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
13 ext_gmac: external-gmac-clock {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <125000000>;
17 clock-output-names = "ext_gmac";
20 keys: gpio-keys {
21 compatible = "gpio-keys";
24 gpio-key,wakeup = <1>;
26 label = "GPIO Power";
[all …]
/openbmc/u-boot/drivers/video/
H A Dsimple_panel.c1 // SPDX-License-Identifier: GPL-2.0+
8 #include <backlight.h>
11 #include <asm/gpio.h>
16 struct udevice *backlight; member
25 debug("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); in simple_panel_enable_backlight()
26 dm_gpio_set_value(&priv->enable, 1); in simple_panel_enable_backlight()
27 ret = backlight_enable(priv->backlight); in simple_panel_enable_backlight()
40 debug("%s: start, backlight = '%s'\n", __func__, priv->backlight->name); in simple_panel_set_backlight()
41 dm_gpio_set_value(&priv->enable, 1); in simple_panel_set_backlight()
42 ret = backlight_set_brightness(priv->backlight, percent); in simple_panel_set_backlight()
[all …]
H A Dpwm_backlight.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <backlight.h>
13 #include <asm/gpio.h>
17 * Private information for the PWM backlight
19 * If @num_levels is 0 then the levels are simple values with the backlight
21 * Otherwise the levels are an index into @levels (0..n-1).
23 * @reg: Regulator to enable to turn the backlight on (NULL if none)
24 * @enable, GPIO to set to enable the backlight (can be missing)
25 * @pwm: PWM to use to change the backlight brightness
27 * @period_ns: Period of the backlight in nanoseconds
[all …]
H A Dbacklight_gpio.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
9 #include <backlight.h>
10 #include <asm/gpio.h>
13 struct gpio_desc gpio; member
21 dm_gpio_set_value(&priv->gpio, 1); in gpio_backlight_enable()
31 ret = gpio_request_by_name(dev, "gpios", 0, &priv->gpio, in gpio_backlight_ofdata_to_platdata()
34 debug("%s: Warning: cannot get GPIO: ret=%d\n", in gpio_backlight_ofdata_to_platdata()
39 priv->def_value = dev_read_bool(dev, "default-on"); in gpio_backlight_ofdata_to_platdata()
48 if (priv->def_value) in gpio_backlight_probe()
[all …]
/openbmc/u-boot/board/armadeus/opos6uldev/
H A Dboard.c1 // SPDX-License-Identifier: GPL-2.0+
7 #include <asm/arch/mx6-pins.h>
9 #include <asm/gpio.h>
10 #include <asm/mach-imx/iomux-v3.h>
49 struct gpio_desc backlight; in setup_lcd() local
57 ret = dm_gpio_lookup_name("GPIO4_10", &backlight); in setup_lcd()
63 ret = dm_gpio_request(&backlight, "backlight"); in setup_lcd()
69 dm_gpio_set_dir_flags(&backlight, GPIOD_IS_OUT); in setup_lcd()
70 dm_gpio_set_value(&backlight, 1); in setup_lcd()
85 return -EINVAL; in board_ehci_hcd_init()
/openbmc/u-boot/drivers/video/sunxi/
H A Dsunxi_lcd.c1 // SPDX-License-Identifier: GPL-2.0+
11 #include <backlight.h>
17 #include <asm/arch/gpio.h>
18 #include <asm/gpio.h>
45 struct udevice *backlight; in sunxi_lcd_enable() local
49 setbits_le32(&ccm->ahb_reset1_cfg, 1 << AHB_RESET_OFFSET_LCD0); in sunxi_lcd_enable()
51 setbits_le32(&ccm->ahb_gate1, 1 << AHB_GATE_OFFSET_LCD0); in sunxi_lcd_enable()
55 lcdc_pll_set(ccm, 0, edid->pixelclock.typ / 1000, in sunxi_lcd_enable()
58 priv->panel_bpp, CONFIG_VIDEO_LCD_DCLK_PHASE); in sunxi_lcd_enable()
59 lcdc_enable(lcdc, priv->panel_bpp); in sunxi_lcd_enable()
[all …]
/openbmc/u-boot/include/
H A Dvideo_bridge.h1 /* SPDX-License-Identifier: GPL-2.0+ */
10 #include <asm/gpio.h>
13 * struct video_bridge_priv - uclass information for video bridges
15 * @sleep: GPIO to assert to power down the bridge
16 * @reset: GPIO to assert to reset the bridge
17 * @hotplug: Optional GPIO to check if bridge is connected
30 * attach() - attach a video bridge
32 * @return 0 if OK, -ve on error
37 * check_attached() - check if a bridge is correctly attached
39 * This method is optional - if not provided then the hotplug GPIO
[all …]
/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_pwm_bl.c1 // SPDX-License-Identifier: GPL-2.0+
3 * PWM BACKLIGHT driver for Board based on EXYNOS.
7 * Derived from linux/drivers/video/backlight/pwm_backlight.c
15 #include <asm/arch/gpio.h>
23 int brightness = pwm->brightness; in exynos_pwm_backlight_update_status()
24 int max = pwm->max_brightness; in exynos_pwm_backlight_update_status()
27 pwm_config(pwm->pwm_id, 0, pwm->period); in exynos_pwm_backlight_update_status()
28 pwm_disable(pwm->pwm_id); in exynos_pwm_backlight_update_status()
30 pwm_config(pwm->pwm_id, in exynos_pwm_backlight_update_status()
31 brightness * pwm->period / max, pwm->period); in exynos_pwm_backlight_update_status()
[all …]

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