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/openbmc/u-boot/arch/arm/dts/
H A Dtegra30-cardhu.dts1 /dts-v1/;
10 stdout-path = &uarta;
30 pcie-controller@00003000 {
33 /* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
34 avdd-pexb-supply = <&ldo1_reg>;
35 vdd-pexb-supply = <&ldo1_reg>;
36 avdd-pex-pll-supply = <&ldo1_reg>;
37 hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
38 vddio-pex-ctl-supply = <&sys_3v3_reg>;
39 avdd-plle-supply = <&ldo2_reg>;
[all …]
H A Dtegra30-beaver.dts1 /dts-v1/;
10 stdout-path = &uarta;
31 pcie-controller@00003000 {
34 avdd-pexa-supply = <&ldo1_reg>;
35 vdd-pexa-supply = <&ldo1_reg>;
36 avdd-pexb-supply = <&ldo1_reg>;
37 vdd-pexb-supply = <&ldo1_reg>;
38 avdd-pex-pll-supply = <&ldo1_reg>;
39 avdd-plle-supply = <&ldo1_reg>;
40 vddio-pex-ctl-supply = <&sys_3v3_reg>;
[all …]
H A Dtegra124-cei-tk1-som.dts1 /dts-v1/;
6 model = "Colorado Engineering TK1-SOM";
7 compatible = "nvidia,cei-tk1-som", "nvidia,tegra124";
10 stdout-path = &uartd;
32 pcie-controller@01003000 {
35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
[all …]
H A Dtegra124-jetson-tk1.dts1 /dts-v1/;
7 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
10 stdout-path = &uartd;
32 pcie-controller@01003000 {
35 avddio-pex-supply = <&vdd_1v05_run>;
36 dvddio-pex-supply = <&vdd_1v05_run>;
37 avdd-pex-pll-supply = <&vdd_1v05_run>;
38 hvdd-pex-supply = <&vdd_3v3_lp0>;
39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>;
[all …]
H A Darmada-388-gp.dts3 * (RD-88F6820-GP)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
42 /dts-v1/;
43 #include "armada-388.dtsi"
44 #include <dt-bindings/gpio/gpio.h>
48 compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
51 stdout-path = "serial0:115200n8";
69 internal-regs {
71 pinctrl-names = "default";
[all …]
H A Dam57xx-idk-common.dtsi2 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
9 #include "am57xx-industrial-grade.dtsi"
18 stdout-path = &uart3;
21 vmain: fixedregulator-vmain {
22 compatible = "regulator-fixed";
23 regulator-name = "VMAIN";
24 regulator-min-microvolt = <5000000>;
25 regulator-max-microvolt = <5000000>;
26 regulator-always-on;
27 regulator-boot-on;
[all …]
H A Dtegra124-nyan.dtsi1 #include <dt-bindings/input/input.h>
19 vdd-supply = <&vdd_3v3_hdmi>;
20 pll-supply = <&vdd_hdmi_pll>;
21 hdmi-supply = <&vdd_5v0_hdmi>;
23 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
24 nvidia,hpd-gpio =
25 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
36 vdd-supply = <&vdd_3v3_panel>;
42 /* Debug connector on the bottom of the board near SD card. */
52 clock-frequency = <100000>;
[all …]
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
15 marvell,function = "gpio";
18 pmx_fanctrl_15: pmx-fanctrl-15 {
20 marvell,function = "gpio";
23 pmx_fanctrl_16: pmx-fanctrl-16 {
25 marvell,function = "gpio";
28 pmx_fanctrl_17: pmx-fanctrl-17 {
30 marvell,function = "gpio";
[all …]
H A Ddra76-evm.dts2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include "dra7-evm-common.dtsi"
12 #include "dra76x-mmc-iodelay.dtsi"
13 #include <dt-bindings/net/ti-dp83867.h>
17 compatible = "ti,dra76-evm", "ti,dra762", "ti,dra7";
24 vsys_12v0: fixedregulator-vsys12v0 {
26 compatible = "regulator-fixed";
27 regulator-name = "vsys_12v0";
28 regulator-min-microvolt = <12000000>;
[all …]
H A Drk3368-sheep.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
15 stdout-path = "serial2:115200n8";
23 ext_gmac: gmac-clk {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "ext_gmac";
27 #clock-cells = <0>;
30 ir: ir-receiver {
[all …]
H A Dsunxi-libretech-all-h3-cc.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2017 Chen-Yu Tsai <wens@csie.org>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
16 stdout-path = "serial0:115200n8";
20 compatible = "gpio-leds";
25 default-state = "on";
35 compatible = "gpio-keys";
45 compatible = "regulator-fixed";
46 regulator-name = "vcc1v2";
[all …]
H A Drk3188-radxarock.dts1 // SPDX-License-Identifier: GPL-2.0+ OR X11
6 /dts-v1/;
7 #include <dt-bindings/input/input.h>
9 #include "rk3188-radxarock-u-boot.dtsi"
16 /* stdout-path = &uart2; */
17 stdout-path = "serial2:115200n8";
21 u-boot,dm-pre-reloc;
22 u-boot,boot-led = "rock:red:power";
30 gpio-keys {
31 compatible = "gpio-keys";
[all …]
H A Ddra7-evm.dts2 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
8 /dts-v1/;
11 #include "dra7-evm-common.dtsi"
12 #include "dra74x-mmc-iodelay.dtsi"
16 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
23 evm_1v8_sw: fixedregulator-evm_1v8 {
24 compatible = "regulator-fixed";
25 regulator-name = "evm_1v8";
26 vin-supply = <&smps9_reg>;
27 regulator-min-microvolt = <1800000>;
[all …]
H A Dtegra20-trimslice.dts1 /dts-v1/;
10 stdout-path = &uarta;
25 clock-frequency = <216000000>;
30 spi-max-frequency = <25000000>;
33 pcie-controller@80003000 {
36 avdd-pex-supply = <&pci_vdd_reg>;
37 vdd-pex-supply = <&pci_vdd_reg>;
38 avdd-pex-pll-supply = <&pci_vdd_reg>;
39 avdd-plle-supply = <&pci_vdd_reg>;
40 vddio-pex-clk-supply = <&pci_clk_reg>;
[all …]
H A Dtegra30-apalis.dts1 /dts-v1/;
10 stdout-path = &uarta;
35 pcie-controller@00003000 {
37 avdd-pexa-supply = <&vdd2_reg>;
38 vdd-pexa-supply = <&vdd2_reg>;
39 avdd-pexb-supply = <&vdd2_reg>;
40 vdd-pexb-supply = <&vdd2_reg>;
41 avdd-pex-pll-supply = <&vdd2_reg>;
42 avdd-plle-supply = <&ldo6_reg>;
43 vddio-pex-ctl-supply = <&sys_3v3_reg>;
[all …]
H A Drk3328-evb.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
11 compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
14 stdout-path = &uart2;
17 gmac_clkin: external-gmac-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <125000000>;
20 clock-output-names = "gmac_clkin";
21 #clock-cells = <0>;
24 vcc3v3_sdmmc: sdmmc-pwren {
[all …]
H A Dimx6ul-9x9-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
7 /dts-v1/;
13 compatible = "fsl,imx6ul-9x9-evk", "fsl,imx6ul";
20 stdout-path = &uart1;
28 compatible = "simple-bus";
29 #address-cells = <1>;
30 #size-cells = <0>;
33 compatible = "regulator-fixed";
35 regulator-name = "can-3v3";
[all …]
H A Drk3288-firefly.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
13 ext_gmac: external-gmac-clock {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <125000000>;
17 clock-output-names = "ext_gmac";
20 ir: ir-receiver {
21 compatible = "gpio-ir-receiver";
22 pinctrl-names = "default";
23 pinctrl-0 = <&ir_int>;
[all …]
H A Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
12 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
22 soft_spi: soft-spi {
23 compatible = "spi-gpio";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_spi1>;
27 gpio-sck = <&gpio1 13 0>;
28 gpio-mosi = <&gpio1 9 0>;
29 cs-gpios = <&gpio1 12 0>;
[all …]
H A Drk3288-tinker.dtsi2 * This file is dual-licensed: you can use it either under the terms
49 ext_gmac: external-gmac-clock {
50 compatible = "fixed-clock";
51 clock-frequency = <125000000>;
52 clock-output-names = "ext_gmac";
53 #clock-cells = <0>;
56 gpio-keys {
57 compatible = "gpio-keys";
60 pinctrl-names = "default";
61 pinctrl-0 = <&pwrbtn>;
[all …]
H A Drk3368-px5-evb.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/input/input.h>
49 compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368";
52 stdout-path = "serial4:115200n8";
60 ext_gmac: gmac-clk {
61 compatible = "fixed-clock";
62 clock-frequency = <125000000>;
63 clock-output-names = "ext_gmac";
64 #clock-cells = <0>;
[all …]
H A Drk3368-geekbox.dts4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include <dt-bindings/input/input.h>
52 stdout-path = "serial2:115200n8";
60 ext_gmac: gmac-clk {
61 compatible = "fixed-clock";
62 clock-frequency = <125000000>;
63 clock-output-names = "ext_gmac";
64 #clock-cells = <0>;
67 ir: ir-receiver {
[all …]
H A Drk3399-gru-chromebook.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
15 /* EC turns on w/ pp900_ap_en; always on for AP */
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
[all …]
H A Dam335x-icev2.dts2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
14 /dts-v1/;
19 model = "TI AM3359 ICE-V2";
20 compatible = "ti,am3359-icev2", "ti,am33xx";
23 stdout-path = &uart3;
24 tick-timer = &timer2;
33 compatible = "regulator-fixed";
34 regulator-name = "vbat";
35 regulator-min-microvolt = <5000000>;
36 regulator-max-microvolt = <5000000>;
[all …]
/openbmc/u-boot/doc/device-tree-bindings/regulator/
H A Dtps65090.txt4 - compatible: "ti,tps65090"
5 - reg: I2C slave address
6 - interrupts: the interrupt outputs of the controller
7 - regulators: A node that houses a sub-node for each regulator within the
8 device. Each sub-node is identified using the node's name, with valid
9 values listed below. The content of each sub-node is defined by the
11 dcdc[1-3], fet[1-7] and ldo[1-2] respectively.
12 - vsys[1-3]-supply: The input supply for DCDC[1-3] respectively.
13 - infet[1-7]-supply: The input supply for FET[1-7] respectively.
14 - vsys-l[1-2]-supply: The input supply for LDO[1-2] respectively.
[all …]

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