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/openbmc/u-boot/drivers/net/fm/
H A Dfm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2009-2011 Freescale Semiconductor, Inc.
31 void *fm_muram_alloc(int fm_idx, size_t size, ulong align) in fm_muram_alloc() argument
38 align_mask = align - 1; in fm_muram_alloc()
43 muram[fm_idx].alloc += (align - off); in fm_muram_alloc()
44 off = size & align_mask; in fm_muram_alloc()
46 size += (align - off); in fm_muram_alloc()
47 if ((muram[fm_idx].alloc + size) >= muram[fm_idx].top) { in fm_muram_alloc()
54 muram[fm_idx].alloc += size; in fm_muram_alloc()
55 memset((void *)ret, 0, size); in fm_muram_alloc()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Drk3xxx.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
33 compatible = "simple-bus";
34 #address-cells = <1>;
35 #size-cells = <1>;
38 dmac1_s: dma-controller@20018000 {
43 #dma-cells = <1>;
44 arm,pl330-broken-no-flushp;
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H A Drk3036.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
13 interrupt-parent = <&gic>;
32 arm-pmu {
33 compatible = "arm,cortex-a7-pmu";
36 interrupt-affinity = <&cpu0>, <&cpu1>;
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H A Dstm32mp157c-ev1-u-boot.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 #include "stm32mp157c-ed1-u-boot.dtsi"
17 compatible = "spi-flash";
21 compatible = "spi-flash";
25 regulator-always-on;
29 g-tx-fifo-size = <576>;
34 u-boot,dm-spl;
38 u-boot,dm-spl;
40 u-boot,dm-spl;
45 u-boot,dm-spl;
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H A Drv1108.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/rv1108-cru.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
17 interrupt-parent = <&gic>;
27 #address-cells = <1>;
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H A Drk3368.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/rk3368-cru.h>
44 #include <dt-bindings/gpio/gpio.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/pinctrl/rockchip.h>
48 #include <dt-bindings/thermal/thermal.h>
49 #include <dt-bindings/memory/rk3368-dmc.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <2>;
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H A Dstm32mp157c.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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H A Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/clock/rk3128-cru.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <1>;
42 arm-pmu {
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/openbmc/u-boot/board/st/stm32mp1/
H A Dstm32mp1.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
10 #include <generic-phy.h>
39 const void *blob = gd->fdt_blob; in board_usb_init()
47 node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc2"); in board_usb_init()
50 return -ENODEV; in board_usb_init()
55 return -ENODEV; in board_usb_init()
60 "#clock-cells", 0, 0, &args); in board_usb_init()
72 return -ENODATA; in board_usb_init()
86 "#reset-cells", 0, 0, &args); in board_usb_init()
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/openbmc/u-boot/include/
H A Dfsl_fman.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright 2010-2011 Freescale Semiconductor, Inc.
27 u32 fmbm_pfs[0x3f]; /* BMI port FIFO size */
72 u32 fmbm_rfp; /* Rx FIFO parameters */
113 u32 fmbm_rfuc; /* Rx FIFO utilization counter */
119 /* FMBM_RCFG - Rx configuration */
124 /* FMBM_RST - Rx status */
127 /* FMBM_RFCA - Rx frame command attributes */
132 /* FMBM_RSTC - Rx statistics */
136 u32 fmbm_tcfg; /* Tx configuration */
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/openbmc/u-boot/drivers/usb/musb-new/
H A Dmusb_gadget.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
19 #include <linux/dma-mapping.h>
24 #include "linux-compat.h"
30 /* MUSB PERIPHERAL status 3-mar-2006:
32 * - EP0 seems solid. It passes both USBCV and usbtest control cases.
37 * + endpoint halt tests -- in both usbtest and usbcv -- seem
41 * - Mass storage behaved ok when last tested. Network traffic patterns
46 * - TX/IN
[all …]
H A Dmusb_host.c1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2005-2006 by Texas Instruments
7 * Copyright (C) 2006-2007 Nokia Corporation
8 * Copyright (C) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
20 #include <linux/dma-mapping.h>
24 #include "linux-compat.h"
25 #include "usb-compat.h"
32 /* MUSB HOST status 22-mar-2006
34 * - There's still lots of partial code duplication for fault paths, so
37 * - PIO mostly behaved when last tested.
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/openbmc/qemu/rust/hw/char/pl011/src/
H A Ddevice.rs3 // SPDX-License-Identifier: GPL-2.0-or-later
51 fn index(&self, idx: hwaddr) -> &Self::Output { in index()
56 // FIFOs use 32-bit indices instead of usize, for compatibility with
60 pub struct Fifo([registers::Data; PL011_FIFO_DEPTH as usize]); struct
61 impl_vmstate_forward!(Fifo);
63 impl Fifo { implementation
64 const fn len(&self) -> u32 { in len()
69 impl std::ops::IndexMut<u32> for Fifo { implementation
70 fn index_mut(&mut self, idx: u32) -> &mut Self::Output { in index_mut()
75 impl std::ops::Index<u32> for Fifo { implementation
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/openbmc/qemu/hw/ssi/
H A Dxilinx_spips.c4 * Copyright (c) 2012 Peter A. G. Crosthwaite
29 #include "hw/qdev-properties.h"
89 #define IXR_ALL ((1 << 13) - 1)
181 * or most recently executed command. So the generic fifo format is defined
198 /* size of TXRX FIFOs */
218 return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS && in num_effective_busses()
219 s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1; in num_effective_busses()
226 for (i = 0; i < s->num_cs * s->num_busses; i++) { in xilinx_spips_update_cs()
227 bool old_state = s->cs_lines_state[i]; in xilinx_spips_update_cs()
231 s->cs_lines_state[i] = new_state; in xilinx_spips_update_cs()
[all …]
H A Dxilinx_spi.c5 * Copyright (C) 2012 Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
35 #include "hw/qdev-properties.h"
36 #include "hw/qdev-properties-system.h"
53 #define IRQ_DRR_NOT_EMPTY (1 << (31 - 23))
54 #define IRQ_DRR_OVERRUN (1 << (31 - 26))
55 #define IRQ_DRR_FULL (1 << (31 - 27))
58 #define IRQ_DTR_EMPTY (1 << (31 - 29))
82 #define TYPE_XILINX_SPI "xlnx.xps-spi"
107 fifo8_reset(&s->tx_fifo); in txfifo_reset()
109 s->regs[R_SPISR] &= ~SR_TX_FULL; in txfifo_reset()
[all …]
/openbmc/u-boot/drivers/net/
H A Dmvpp2.c8 * U-Boot version:
9 * Copyright (C) 2016-2017 Stefan Roese <sr@denx.de>
18 #include <dm/device-internal.h>
33 #include <asm-generic/gpio.h>
67 /* RX Fifo Registers */
309 /* TX Scheduler registers */
333 /* TX general registers */
346 /* Per-port registers */
392 * Per-port XGMAC registers. PPv2.2 only, only for GOP port 0,
393 * relative to port->base.
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/openbmc/u-boot/drivers/usb/dwc3/
H A Dcore.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * core.h - DesignWare USB3 DRD Core Header
5 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
10 * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/core.h) and ported
180 /* Global TX Fifo Size Register */
184 /* Global Event Size Registers */
378 * struct dwc3_event_buffer - Software event buffer representation
380 * @length: size of this buffer
408 #define DWC3_TRB_MASK (DWC3_TRB_NUM - 1)
411 * struct dwc3_ep - device side endpoint representation
[all …]
H A Dgadget.c1 // SPDX-License-Identifier: GPL-2.0
3 * gadget.c - DesignWare USB3 DRD Controller Gadget Framework Link
5 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
10 * Taken from Linux Kernel v3.19-rc1 (drivers/usb/dwc3/gadget.c) and ported
13 * commit 8e74475b0e : usb: dwc3: gadget: use udc-core's reset notifier
18 #include <asm/dma-mapping.h>
29 #include "linux-compat.h"
32 * dwc3_gadget_set_test_mode - Enables USB2 Test Modes
37 * return 0 on success or -EINVAL if wrong Test Selector
44 reg = dwc3_readl(dwc->regs, DWC3_DCTL); in dwc3_gadget_set_test_mode()
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/openbmc/qemu/hw/char/
H A Dcadence_uart.c5 * - http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
6 * - Chapter 19 UART Controller
7 * - Appendix B for Register details
10 * Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
27 #include "chardev/char-fe.h"
28 #include "chardev/char-serial.h"
34 #include "hw/qdev-clock.h"
35 #include "hw/qdev-properties-system.h"
127 s->r[R_SR] = 0; in uart_update_status()
129 s->r[R_SR] |= s->rx_count == CADENCE_UART_RX_FIFO_SIZE ? UART_SR_INTR_RFUL in uart_update_status()
[all …]
/openbmc/qemu/docs/
H A DCOLO-FT.txt1 COarse-grained LOck-stepping Virtual Machines for Non-stop Service
2 ----------------------------------------
8 See the COPYING file in the top-level directory.
14 application-agnostic software-implemented hardware fault tolerance,
15 also known as "non-stop service".
17 COLO (COarse-grained LOck-stepping) is a high availability solution.
45 +------------+ +-----------------------+ +------------------------+ +------------+
46 | | | HeartBeat +<----->+ HeartBeat | | |
47 | Primary VM | +-----------+-----------+ +-----------+------------+ |Secondary VM|
49 | | +-----------|-----------+ +-----------|------------+ | |
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/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h6 /* ------------------------------------------------------------------------
8 * ------------------------------------------------------------------------
315 #define PWMC_HCTR (0x01<<18) /* Halfword FIFO Data Swapping */
316 #define PWMC_BCTR (0x01<<17) /* Byte FIFO Data Swapping */
319 #define PWMC_PRESCALER(x) (((x-1) & 0x7F) << 8) /* PRESCALER */
322 #define PWMC_FIFOAV (0x01<< 5) /* FIFO Available */
327 #define PWMS_SAMPLE(x) ((x) & 0xFFFF) /* Contains a two-sample word */
342 #define WSRA __REG(IMX_DMAC_BASE +0x40) /* W-Size Register A */
343 #define XSRA __REG(IMX_DMAC_BASE +0x44) /* X-Size Register A */
344 #define YSRA __REG(IMX_DMAC_BASE +0x48) /* Y-Size Register A */
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2 * linux/include/asm-arm/arch-pxa/pxa-regs.h
12 * - 2003/01/20: Robert Schwebel <r.schwebel@pengutronix.de
13 * Original file taken from linux-2.4.19-rmk4-pxa1. Added some definitions.
22 /* FIXME hack so that SA-1111.h will work [cb] */
134 #define DCSR_NODESC (1 << 30) /* No-Descriptor Fetch (read / write) */
147 #define DCSR_REQPEND (1 << 8) /* Request Pending (read-only) */
148 #define DCSR_STOPSTATE (1 << 3) /* Stop State (read-only) */
196 #define DRCMR68 0x40001110 /* Request to Channel Map Register for Camera FIFO 0 Request */
197 #define DRCMR69 0x40001114 /* Request to Channel Map Register for Camera FIFO 1 Request */
198 #define DRCMR70 0x40001118 /* Request to Channel Map Register for Camera FIFO 2 Request */
[all …]
/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_dp_lowlevel.c1 // SPDX-License-Identifier: GPL-2.0+
24 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_input()
31 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_input()
41 reg = readl(&dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
48 writel(reg, &dp_regs->video_ctl4); in exynos_dp_enable_video_bist()
57 reg = readl(&dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
62 writel(reg, &dp_regs->video_ctl1); in exynos_dp_enable_video_mute()
74 * Normal bandgap, Normal swing, Tx terminal registor 61 ohm in exynos_dp_init_analog_param()
75 * 24M Phy clock, TX digital logic power is 100:1.0625V in exynos_dp_init_analog_param()
79 writel(reg, &dp_regs->analog_ctl1); in exynos_dp_init_analog_param()
[all …]
/openbmc/u-boot/drivers/usb/gadget/
H A Dether.c1 // SPDX-License-Identifier: GPL-2.0+
3 * ether.c -- Ethernet gadget driver, with CDC and non-CDC options
5 * Copyright (C) 2003-2005,2008 David Brownell
6 * Copyright (C) 2003-2004 Robert Schwebel, Benedikt Spranger
29 #include <dm/uclass-internal.h>
30 #include <dm/device-internal.h>
41 * Ethernet gadget driver -- with CDC and non-CDC options
47 * this USB-IF standard as its open-systems interoperability solution;
51 * TLA-soup. "CDC ACM" (Abstract Control Model) is for modems, and a new
55 * implement a "minimalist" vendor-agnostic CDC core: same framing, but
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/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_5329.h1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
70 u32 res1[15]; /* 0x04 - 0x3F */
72 u32 res2[3]; /* 0x44 - 0x53 */
79 u32 res1[7]; /* 0x04 - 0x1F */
84 u32 res2[4]; /* 0x30 - 0x3F */
87 u32 pacrg; /* 0x48 Peripheral Access Control Register G */
88 u32 res3[2]; /* 0x4C - 0x53 */
94 u8 res1[19]; /* 0x00 - 0x12 */
[all …]

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